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https://github.com/ARM-software/arm-trusted-firmware.git
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Merge changes from topic "cot_cca_nvctr" into integration
* changes: feat(fvp): mock support for CCA NV ctr feat(auth): add CCA NV ctr to CCA CoT feat(build): pass CCA NV ctr option to cert_create feat(cert-create): add new option for CCA NV ctr
This commit is contained in:
commit
7f126ccff6
8 changed files with 79 additions and 14 deletions
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@ -42,8 +42,8 @@ static unsigned char plat_pk_buf[PK_DER_LEN];
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/*
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* Parameter type descriptors.
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*/
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static auth_param_type_desc_t trusted_nv_ctr = AUTH_PARAM_TYPE_DESC(
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AUTH_PARAM_NV_CTR, TRUSTED_FW_NVCOUNTER_OID);
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static auth_param_type_desc_t cca_nv_ctr = AUTH_PARAM_TYPE_DESC(
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AUTH_PARAM_NV_CTR, CCA_FW_NVCOUNTER_OID);
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static auth_param_type_desc_t subject_pk = AUTH_PARAM_TYPE_DESC(
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AUTH_PARAM_PUB_KEY, 0);
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static auth_param_type_desc_t sig = AUTH_PARAM_TYPE_DESC(
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@ -69,6 +69,8 @@ static auth_param_type_desc_t rmm_hash = AUTH_PARAM_TYPE_DESC(
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AUTH_PARAM_HASH, RMM_HASH_OID);
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#ifdef IMAGE_BL2
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static auth_param_type_desc_t trusted_nv_ctr = AUTH_PARAM_TYPE_DESC(
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AUTH_PARAM_NV_CTR, TRUSTED_FW_NVCOUNTER_OID);
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static auth_param_type_desc_t non_trusted_nv_ctr = AUTH_PARAM_TYPE_DESC(
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AUTH_PARAM_NV_CTR, NON_TRUSTED_FW_NVCOUNTER_OID);
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@ -127,8 +129,8 @@ static const auth_img_desc_t cca_content_cert = {
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[1] = {
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.type = AUTH_METHOD_NV_CTR,
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.param.nv_ctr = {
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.cert_nv_ctr = &trusted_nv_ctr,
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.plat_nv_ctr = &trusted_nv_ctr
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.cert_nv_ctr = &cca_nv_ctr,
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.plat_nv_ctr = &cca_nv_ctr
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}
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}
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},
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2022, Arm Limited. All rights reserved.
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* Copyright (c) 2022-2023, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -25,4 +25,7 @@
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/* Realm Monitor Manager (RMM) Hash */
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#define RMM_HASH_OID "1.3.6.1.4.1.4128.2100.1106"
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/* CCAFirmwareNVCounter - Non-volatile counter extension */
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#define CCA_FW_NVCOUNTER_OID "1.3.6.1.4.1.4128.2100.3"
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#endif /* CCA_OID_H */
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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@ -43,10 +43,14 @@ FWU_CERT := ${BUILD_PLAT}/fwu_cert.crt
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# Default non-volatile counter values (overridable by the platform)
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TFW_NVCTR_VAL ?= 0
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NTFW_NVCTR_VAL ?= 0
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CCAFW_NVCTR_VAL ?= 0
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# Pass the non-volatile counters to the cert_create tool
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$(eval $(call CERT_ADD_CMD_OPT,${TFW_NVCTR_VAL},--tfw-nvctr))
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$(eval $(call CERT_ADD_CMD_OPT,${NTFW_NVCTR_VAL},--ntfw-nvctr))
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ifeq (${COT},cca)
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$(eval $(call CERT_ADD_CMD_OPT,${CCAFW_NVCTR_VAL},--ccafw-nvctr))
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endif
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# Add Trusted Key certificate to the fiptool and cert_create command line options
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ifneq (${COT},cca)
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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@ -67,11 +67,16 @@ endif
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# ARM development platforms
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TFW_NVCTR_VAL ?= 31
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NTFW_NVCTR_VAL ?= 223
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# The CCA Non-Volatile Counter only exists on some Arm development platforms.
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# On others, we mock it by aliasing it to the Trusted Firmware Non-Volatile counter,
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# hence we set both counters to the same default value.
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CCAFW_NVCTR_VAL ?= 31
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else
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# Certificate NV-Counters when CryptoCell is integrated. For development
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# platforms we set the counter to first valid value.
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TFW_NVCTR_VAL ?= 0
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NTFW_NVCTR_VAL ?= 0
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CCAFW_NVCTR_VAL ?= 0
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endif
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BL1_SOURCES += plat/arm/board/common/board_arm_trusted_boot.c \
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${ARM_ROTPK_S}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -14,7 +14,7 @@
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#include <plat/arm/common/fconf_nv_cntr_getter.h>
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#include <plat/common/platform.h>
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#include <platform_def.h>
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#include <tools_share/tbbr_oid.h>
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#include <tools_share/cca_oid.h>
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/*
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* Return the ROTPK hash in the following ASN.1 structure in DER format:
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@ -57,6 +57,10 @@ int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr)
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} else if (strcmp(oid, NON_TRUSTED_FW_NVCOUNTER_OID) == 0) {
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nv_ctr_addr = FCONF_GET_PROPERTY(cot, nv_cntr_addr,
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NON_TRUSTED_NV_CTR_ID);
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} else if (strcmp(oid, CCA_FW_NVCOUNTER_OID) == 0) {
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/* FVP does not support the CCA NV Counter so use the Trusted NV */
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nv_ctr_addr = FCONF_GET_PROPERTY(cot, nv_cntr_addr,
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TRUSTED_NV_CTR_ID);
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} else {
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return 1;
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}
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@ -69,3 +73,37 @@ int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr)
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*/
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return (mmio_read_32(nv_ctr_addr) == nv_ctr) ? 0 : 1;
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}
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/*
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* Return the non-volatile counter value stored in the platform. The cookie
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* will contain the OID of the counter in the certificate.
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*
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* Return: 0 = success, Otherwise = error
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*/
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int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr)
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{
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const char *oid;
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uint32_t *nv_ctr_addr;
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assert(cookie != NULL);
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assert(nv_ctr != NULL);
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oid = (const char *)cookie;
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if (strcmp(oid, TRUSTED_FW_NVCOUNTER_OID) == 0) {
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nv_ctr_addr = (uint32_t *)FCONF_GET_PROPERTY(cot, nv_cntr_addr,
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TRUSTED_NV_CTR_ID);
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} else if (strcmp(oid, NON_TRUSTED_FW_NVCOUNTER_OID) == 0) {
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nv_ctr_addr = (uint32_t *)FCONF_GET_PROPERTY(cot, nv_cntr_addr,
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NON_TRUSTED_NV_CTR_ID);
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} else if (strcmp(oid, CCA_FW_NVCOUNTER_OID) == 0) {
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/* FVP does not support the CCA NV Counter so use the Trusted NV */
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nv_ctr_addr = (uint32_t *)FCONF_GET_PROPERTY(cot, nv_cntr_addr,
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TRUSTED_NV_CTR_ID);
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} else {
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return 1;
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}
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*nv_ctr = (unsigned int)(*nv_ctr_addr);
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return 0;
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2022, Arm Limited. All rights reserved.
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* Copyright (c) 2022-2023, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -24,6 +24,7 @@ enum {
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/* Certificate extensions. */
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enum {
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/* Extensions used in certificates owned by the silicon provider. */
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CCA_FW_NVCOUNTER_EXT,
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TRUSTED_FW_NVCOUNTER_EXT,
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TRUSTED_BOOT_FW_HASH_EXT,
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TRUSTED_BOOT_FW_CONFIG_HASH_EXT,
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -20,7 +20,8 @@ enum ext_type_e {
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/* NV-Counter types */
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enum nvctr_type_e {
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NVCTR_TYPE_TFW,
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NVCTR_TYPE_NTFW
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NVCTR_TYPE_NTFW,
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NVCTR_TYPE_CCAFW
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};
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/*
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2022, Arm Limited. All rights reserved.
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* Copyright (c) 2022-2023, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -27,7 +27,7 @@ static cert_t cot_certs[] = {
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.key = ROT_KEY,
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.issuer = CCA_CONTENT_CERT,
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.ext = {
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TRUSTED_FW_NVCOUNTER_EXT,
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CCA_FW_NVCOUNTER_EXT,
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SOC_AP_FW_HASH_EXT,
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SOC_FW_CONFIG_HASH_EXT,
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RMM_HASH_EXT,
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@ -139,6 +139,17 @@ REGISTER_COT(cot_certs);
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/* Certificate extensions. */
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static ext_t cot_ext[] = {
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[CCA_FW_NVCOUNTER_EXT] = {
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.oid = CCA_FW_NVCOUNTER_OID,
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.opt = "ccafw-nvctr",
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.help_msg = "CCA Firmware Non-Volatile counter value",
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.sn = "CCANVCounter",
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.ln = "CCA Non-Volatile counter",
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.asn1_type = V_ASN1_INTEGER,
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.type = EXT_TYPE_NVCOUNTER,
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.attr.nvctr_type = NVCTR_TYPE_CCAFW
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},
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[TRUSTED_FW_NVCOUNTER_EXT] = {
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.oid = TRUSTED_FW_NVCOUNTER_OID,
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.opt = "tfw-nvctr",
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