errata: workaround for Neoverse N2 erratum 2189731

Neoverse N2 erratum 2189731 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUACTLR5_EL1[44] to 1 which will cause the CPP instruction to
invalidate the hardware prefetcher state trained from any EL.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Iddc6a59adf9fa3cab560c46f2133e1f5a8b3ad03
This commit is contained in:
Bipin Ravi 2021-08-30 13:02:51 -05:00
parent afc2ed63f9
commit 7cfae93227
4 changed files with 51 additions and 1 deletions

View file

@ -386,7 +386,6 @@ For Cortex-A710, the following errata build flags are defined :
Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
of the CPU and is still open. of the CPU and is still open.
For Neoverse N2, the following errata build flags are defined : For Neoverse N2, the following errata build flags are defined :
- ``ERRATA_N2_2067956``: This applies errata 2067956 workaround to Neoverse-N2 - ``ERRATA_N2_2067956``: This applies errata 2067956 workaround to Neoverse-N2
@ -395,6 +394,10 @@ For Neoverse N2, the following errata build flags are defined :
- ``ERRATA_N2_2025414``: This applies errata 2025414 workaround to Neoverse-N2 - ``ERRATA_N2_2025414``: This applies errata 2025414 workaround to Neoverse-N2
CPU. This needs to be enabled for revision r0p0 of the CPU and is still open. CPU. This needs to be enabled for revision r0p0 of the CPU and is still open.
- ``ERRATA_N2_2189731``: This applies errata 2189731 workaround to Neoverse-N2
CPU. This needs to be enabled only for revision r0p0 of the CPU and is still
open.
DSU Errata Workarounds DSU Errata Workarounds
---------------------- ----------------------

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@ -35,4 +35,10 @@
#define NEOVERSE_N2_CPUACTLR2_EL1 S3_0_C15_C1_1 #define NEOVERSE_N2_CPUACTLR2_EL1 S3_0_C15_C1_1
#define NEOVERSE_N2_CPUACTLR2_EL1_BIT_2 (ULL(1) << 2) #define NEOVERSE_N2_CPUACTLR2_EL1_BIT_2 (ULL(1) << 2)
/*******************************************************************************
* CPU Auxiliary Control register 5 specific definitions.
******************************************************************************/
#define NEOVERSE_N2_CPUACTLR5_EL1 S3_0_C15_C8_0
#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 (ULL(1) << 44)
#endif /* NEOVERSE_N2_H */ #endif /* NEOVERSE_N2_H */

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@ -114,6 +114,33 @@ func check_errata_2025414
b cpu_rev_var_ls b cpu_rev_var_ls
endfunc check_errata_2025414 endfunc check_errata_2025414
/* ---------------------------------------------------------------
* Errata Workaround for Neoverse N2 Erratum 2189731.
* This applies to revision r0p0 of Neoverse N2 and is still open.
* Inputs:
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* ---------------------------------------------------------------
*/
func errata_n2_2189731_wa
/* Compare x0 against revision r0p0 */
mov x17, x30
bl check_errata_2189731
cbz x0, 1f
mrs x1, NEOVERSE_N2_CPUACTLR5_EL1
orr x1, x1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_44
msr NEOVERSE_N2_CPUACTLR5_EL1, x1
1:
ret x17
endfunc errata_n2_2189731_wa
func check_errata_2189731
/* Applies to r0p0 */
mov x1, #0x00
b cpu_rev_var_ls
endfunc check_errata_2189731
/* ------------------------------------------- /* -------------------------------------------
* The CPU Ops reset function for Neoverse N2. * The CPU Ops reset function for Neoverse N2.
* ------------------------------------------- * -------------------------------------------
@ -144,6 +171,11 @@ func neoverse_n2_reset_func
bl errata_n2_2025414_wa bl errata_n2_2025414_wa
#endif #endif
#if ERRATA_N2_2189731
mov x0, x18
bl errata_n2_2189731_wa
#endif
#if ENABLE_AMU #if ENABLE_AMU
/* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
mrs x0, cptr_el3 mrs x0, cptr_el3
@ -207,6 +239,7 @@ func neoverse_n2_errata_report
report_errata ERRATA_N2_2002655, neoverse_n2, 2002655 report_errata ERRATA_N2_2002655, neoverse_n2, 2002655
report_errata ERRATA_N2_2067956, neoverse_n2, 2067956 report_errata ERRATA_N2_2067956, neoverse_n2, 2067956
report_errata ERRATA_N2_2025414, neoverse_n2, 2025414 report_errata ERRATA_N2_2025414, neoverse_n2, 2025414
report_errata ERRATA_N2_2189731, neoverse_n2, 2189731
ldp x8, x30, [sp], #16 ldp x8, x30, [sp], #16
ret ret

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@ -429,6 +429,10 @@ ERRATA_N2_2067956 ?=0
# to revision r0p0 of the Neoverse N2 cpu and is still open. # to revision r0p0 of the Neoverse N2 cpu and is still open.
ERRATA_N2_2025414 ?=0 ERRATA_N2_2025414 ?=0
# Flag to apply erratum 2189731 workaround during reset. This erratum applies
# to revision r0p0 of the Neoverse N2 cpu and is still open.
ERRATA_N2_2189731 ?=0
# Flag to apply erratum 2055002 workaround during reset. This erratum applies # Flag to apply erratum 2055002 workaround during reset. This erratum applies
# to revision r1p0, r2p0 of the Cortex-A710 cpu and is still open. # to revision r1p0, r2p0 of the Cortex-A710 cpu and is still open.
ERRATA_A710_2055002 ?=0 ERRATA_A710_2055002 ?=0
@ -798,6 +802,10 @@ $(eval $(call add_define,ERRATA_N2_2067956))
$(eval $(call assert_boolean,ERRATA_N2_2025414)) $(eval $(call assert_boolean,ERRATA_N2_2025414))
$(eval $(call add_define,ERRATA_N2_2025414)) $(eval $(call add_define,ERRATA_N2_2025414))
# Process ERRATA_N2_2189731 flag
$(eval $(call assert_boolean,ERRATA_N2_2189731))
$(eval $(call add_define,ERRATA_N2_2189731))
# Process ERRATA_A710_2055002 flag # Process ERRATA_A710_2055002 flag
$(eval $(call assert_boolean,ERRATA_A710_2055002)) $(eval $(call assert_boolean,ERRATA_A710_2055002))
$(eval $(call add_define,ERRATA_A710_2055002)) $(eval $(call add_define,ERRATA_A710_2055002))