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https://github.com/ARM-software/arm-trusted-firmware.git
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Add context management library
This patch adds support for a cpu context management library. This library will be used to: 1. Share pointers to secure and non-secure state cpu contexts between runtime services e.g. PSCI and Secure Payload Dispatcher services 2. Set SP_EL3 to a context structure which will be used for programming an ERET into a lower EL 3. Provide wrapper functions to save and restore EL3 & EL1 state. These functions will in turn use the helper functions in context.S Change-Id: I655eeef83dcd2a0c6f2eb2ac23efab866ac83ca0
This commit is contained in:
Achin Gupta
Dan Handley
parent
9ac63c59c4
commit
7aea908761
5 changed files with 239 additions and 2 deletions
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@ -64,6 +64,7 @@ BL31_OBJS += bl31_arch_setup.o \
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bakery_lock.o \
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runtime_svc.o \
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early_exceptions.o \
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context_mgmt.o \
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context.o
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BL31_ENTRY_POINT := bl31_entrypoint
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@ -38,6 +38,15 @@
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#include <bl_common.h>
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#include <bl31.h>
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#include <runtime_svc.h>
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#include <context_mgmt.h>
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/*******************************************************************************
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* Simple function to initialise all BL31 helper libraries.
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******************************************************************************/
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void bl31_lib_init()
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{
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cm_init();
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}
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void bl31_arch_next_el_setup(void);
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@ -59,7 +68,8 @@ void bl31_main(void)
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#if defined (__GNUC__)
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printf("BL31 Built : %s, %s\n\r", __TIME__, __DATE__);
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#endif
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/* Initialise helper libraries */
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bl31_lib_init();
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/* Initialize the runtime services e.g. psci */
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runtime_svc_init(mpidr);
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176
bl31/context_mgmt.c
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176
bl31/context_mgmt.c
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@ -0,0 +1,176 @@
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/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include <errno.h>
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#include <string.h>
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#include <assert.h>
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#include <arch_helpers.h>
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#include <platform.h>
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#include <bl_common.h>
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#include <runtime_svc.h>
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#include <context_mgmt.h>
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/*******************************************************************************
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* Data structure which holds the pointers to non-secure and secure security
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* state contexts for each cpu. It is aligned to the cache line boundary to
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* allow efficient concurrent manipulation of these pointers on different cpus
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******************************************************************************/
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typedef struct {
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void *ptr[2];
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} __aligned (CACHE_WRITEBACK_GRANULE) context_info;
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static context_info cm_context_info[PLATFORM_CORE_COUNT];
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/*******************************************************************************
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* Context management library initialisation routine. This library is used by
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* runtime services to share pointers to 'cpu_context' structures for the secure
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* and non-secure states. Management of the structures and their associated
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* memory is not done by the context management library e.g. the PSCI service
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* manages the cpu context used for entry from and exit to the non-secure state.
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* The Secure payload dispatcher service manages the context(s) corresponding to
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* the secure state. It also uses this library to get access to the non-secure
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* state cpu context pointers.
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* Lastly, this library provides the api to make SP_EL3 point to the cpu context
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* which will used for programming an entry into a lower EL. The same context
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* will used to save state upon exception entry from that EL.
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******************************************************************************/
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void cm_init()
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{
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/*
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* The context management library has only global data to intialize, but
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* that will be done when the BSS is zeroed out
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*/
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}
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/*******************************************************************************
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* This function returns a pointer to the most recent 'cpu_context' structure
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* that was set as the context for the specified security state. NULL is
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* returned if no such structure has been specified.
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******************************************************************************/
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void *cm_get_context(uint64_t mpidr, uint32_t security_state)
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{
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uint32_t linear_id = platform_get_core_pos(mpidr);
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assert(security_state <= NON_SECURE);
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return cm_context_info[linear_id].ptr[security_state];
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}
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/*******************************************************************************
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* This function sets the pointer to the current 'cpu_context' structure for the
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* specified security state.
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******************************************************************************/
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void cm_set_context(uint64_t mpidr, void *context, uint32_t security_state)
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{
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uint32_t linear_id = platform_get_core_pos(mpidr);
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assert(security_state <= NON_SECURE);
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cm_context_info[linear_id].ptr[security_state] = context;
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}
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/*******************************************************************************
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* The next four functions are used by runtime services to save and restore EL3
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* and EL1 contexts on the 'cpu_context' structure for the specified security
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* state.
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******************************************************************************/
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void cm_el3_sysregs_context_save(uint32_t security_state)
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{
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cpu_context *ctx;
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ctx = cm_get_context(read_mpidr(), security_state);
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assert(ctx);
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el3_sysregs_context_save(get_el3state_ctx(ctx));
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}
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void cm_el3_sysregs_context_restore(uint32_t security_state)
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{
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cpu_context *ctx;
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ctx = cm_get_context(read_mpidr(), security_state);
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assert(ctx);
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el3_sysregs_context_restore(get_el3state_ctx(ctx));
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}
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void cm_el1_sysregs_context_save(uint32_t security_state)
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{
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cpu_context *ctx;
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ctx = cm_get_context(read_mpidr(), security_state);
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assert(ctx);
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el1_sysregs_context_save(get_sysregs_ctx(ctx));
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}
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void cm_el1_sysregs_context_restore(uint32_t security_state)
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{
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cpu_context *ctx;
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ctx = cm_get_context(read_mpidr(), security_state);
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assert(ctx);
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el1_sysregs_context_restore(get_sysregs_ctx(ctx));
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}
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/*******************************************************************************
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* This function is used to program SP_EL3 to point to the 'cpu_context'
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* structure which will be used for programming the EL3 architectural state to
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* enable an ERET into a lower EL e.g. general purpose registers and system
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* registers like SCR_EL3, SPSR_EL3, SCR_EL3 etc. The same structure will be
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* used to save the same registers after an exception entry from the lower EL.
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******************************************************************************/
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void cm_set_next_eret_context(uint32_t security_state)
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{
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cpu_context *ctx;
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#if DEBUG
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uint64_t sp_mode;
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#endif
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ctx = cm_get_context(read_mpidr(), security_state);
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assert(ctx);
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#if DEBUG
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/*
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* Check that this function is called with SP_EL0 as the stack
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* pointer
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*/
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__asm__ volatile("mrs %0, SPSel\n"
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: "=r" (sp_mode));
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assert(sp_mode == MODE_SP_EL0);
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#endif
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__asm__ volatile("msr spsel, #1\n"
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"mov sp, %0\n"
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"msr spsel, #0\n"
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: : "r" (ctx));
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}
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@ -214,7 +214,6 @@
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#define GET_RW(mode) ((mode >> MODE_RW_SHIFT) & 0x1)
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#define GET_EL(mode) ((mode >> MODE_EL_SHIFT) & 0x3)
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#define GET_SP(mode) ((mode >> MODE_SP_SHIFT) & 0x1)
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#define PSR_MODE(rw, el, sp) (rw << MODE_RW_SHIFT | el << MODE_EL_SHIFT \
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| sp << MODE_SP_SHIFT)
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51
include/context_mgmt.h
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51
include/context_mgmt.h
Normal file
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@ -0,0 +1,51 @@
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/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __CM_H__
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#define __CM_H__
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#include <context.h>
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#ifndef __ASSEMBLY__
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/*******************************************************************************
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* Function & variable prototypes
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******************************************************************************/
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extern void cm_init(void);
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extern void *cm_get_context(uint64_t mpidr, uint32_t security_state);
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extern void cm_set_context(uint64_t mpidr,
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void *context,
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uint32_t security_state);
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extern void cm_el3_sysregs_context_save(uint32_t security_state);
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extern void cm_el3_sysregs_context_restore(uint32_t security_state);
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extern void cm_el1_sysregs_context_save(uint32_t security_state);
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extern void cm_el1_sysregs_context_restore(uint32_t security_state);
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extern void cm_set_next_eret_context(uint32_t security_state);
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#endif /*__ASSEMBLY__*/
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#endif /* __CM_H__ */
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