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Merge changes from topic "lw/errata_refactor" into integration
* changes: refactor(cpus): convert Neoverse-N1 to use helpers refactor(cpus): convert Neoverse-N1 to framework refactor(cpus): reorder Neoverse-N1 .S file refactor(cpus): convert Neoverse-E1 to framework
This commit is contained in:
Bipin Ravi
TrustedFirmware Code Review
commit
79e2fae7cf
2 changed files with 167 additions and 629 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -21,20 +21,18 @@
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#error "Neoverse-E1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
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#endif
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/* -------------------------------------------------
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* The CPU Ops reset function for Neoverse-E1.
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* Shall clobber: x0-x19
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* -------------------------------------------------
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*/
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func neoverse_e1_reset_func
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mov x19, x30
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/*
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* ERRATA_DSU_936184:
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* The errata is defined in dsu_helpers.S and applies to neoverse_e1.
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* Henceforth creating symbolic names to the already existing errata
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* workaround functions to get them registered under the Errata Framework.
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*/
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.equ check_erratum_neoverse_e1_936184, check_errata_dsu_936184
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.equ erratum_neoverse_e1_936184_wa, errata_dsu_936184_wa
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add_erratum_entry neoverse_e1, ERRATUM(936184), ERRATA_DSU_936184, APPLY_AT_RESET
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#if ERRATA_DSU_936184
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bl errata_dsu_936184_wa
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#endif
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ret x19
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endfunc neoverse_e1_reset_func
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cpu_reset_func_start neoverse_e1
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cpu_reset_func_end neoverse_e1
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func neoverse_e1_cpu_pwr_dwn
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mrs x0, NEOVERSE_E1_CPUPWRCTLR_EL1
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@ -44,27 +42,7 @@ func neoverse_e1_cpu_pwr_dwn
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ret
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endfunc neoverse_e1_cpu_pwr_dwn
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#if REPORT_ERRATA
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/*
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* Errata printing function for Neoverse N1. Must follow AAPCS.
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*/
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func neoverse_e1_errata_report
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stp x8, x30, [sp, #-16]!
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bl cpu_get_rev_var
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mov x8, x0
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/*
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* Report all errata. The revision-variant information is passed to
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* checking functions of each errata.
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*/
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report_errata ERRATA_DSU_936184, neoverse_e1, dsu_936184
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ldp x8, x30, [sp], #16
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ret
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endfunc neoverse_e1_errata_report
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#endif
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errata_report_shim neoverse_e1
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.section .rodata.neoverse_e1_regs, "aS"
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neoverse_e1_regs: /* The ascii list of register names to be reported */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2022, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -27,20 +27,17 @@
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wa_cve_2022_23960_bhb_vector_table NEOVERSE_N1_BHB_LOOP_COUNT, neoverse_n1
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#endif /* WORKAROUND_CVE_2022_23960 */
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Erratum 1043202.
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* This applies to revision r0p0 and r1p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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/*
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* ERRATA_DSU_936184:
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* The errata is defined in dsu_helpers.S and applies to Neoverse N1.
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* Henceforth creating symbolic names to the already existing errata
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* workaround functions to get them registered under the Errata Framework.
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*/
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func errata_n1_1043202_wa
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/* Compare x0 against revision r1p0 */
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mov x17, x30
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bl check_errata_1043202
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cbz x0, 1f
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.equ check_erratum_neoverse_n1_936184, check_errata_dsu_936184
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.equ erratum_neoverse_n1_936184_wa, errata_dsu_936184_wa
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add_erratum_entry neoverse_n1, ERRATUM(936184), ERRATA_DSU_936184, APPLY_AT_RESET
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workaround_reset_start neoverse_n1, ERRATUM(1043202), ERRATA_N1_1043202
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/* Apply instruction patching sequence */
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ldr x0, =0x0
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msr CPUPSELR_EL3, x0
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@ -50,16 +47,140 @@ func errata_n1_1043202_wa
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msr CPUPMR_EL3, x0
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ldr x0, =0x800200071
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msr CPUPCR_EL3, x0
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isb
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1:
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ret x17
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endfunc errata_n1_1043202_wa
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workaround_reset_end neoverse_n1, ERRATUM(1043202)
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func check_errata_1043202
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/* Applies to r0p0 and r1p0 */
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mov x1, #0x10
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b cpu_rev_var_ls
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endfunc check_errata_1043202
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check_erratum_ls neoverse_n1, ERRATUM(1043202), CPU_REV(1, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1073348), ERRATA_N1_1073348
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sysreg_bit_set NEOVERSE_N1_CPUACTLR_EL1, NEOVERSE_N1_CPUACTLR_EL1_BIT_6
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workaround_reset_end neoverse_n1, ERRATUM(1073348)
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check_erratum_ls neoverse_n1, ERRATUM(1073348), CPU_REV(1, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1130799), ERRATA_N1_1130799
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sysreg_bit_set NEOVERSE_N1_CPUACTLR2_EL1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_59
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workaround_reset_end neoverse_n1, ERRATUM(1130799)
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check_erratum_ls neoverse_n1, ERRATUM(1130799), CPU_REV(2, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1165347), ERRATA_N1_1165347
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sysreg_bit_set NEOVERSE_N1_CPUACTLR2_EL1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_0
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sysreg_bit_set NEOVERSE_N1_CPUACTLR2_EL1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_15
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workaround_reset_end neoverse_n1, ERRATUM(1165347)
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check_erratum_ls neoverse_n1, ERRATUM(1165347), CPU_REV(2, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1207823), ERRATA_N1_1207823
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sysreg_bit_set NEOVERSE_N1_CPUACTLR2_EL1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_11
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workaround_reset_end neoverse_n1, ERRATUM(1207823)
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check_erratum_ls neoverse_n1, ERRATUM(1207823), CPU_REV(2, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1220197), ERRATA_N1_1220197
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sysreg_bit_set NEOVERSE_N1_CPUECTLR_EL1, NEOVERSE_N1_WS_THR_L2_MASK
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workaround_reset_end neoverse_n1, ERRATUM(1220197)
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check_erratum_ls neoverse_n1, ERRATUM(1220197), CPU_REV(2, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1257314), ERRATA_N1_1257314
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sysreg_bit_set NEOVERSE_N1_CPUACTLR3_EL1, NEOVERSE_N1_CPUACTLR3_EL1_BIT_10
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workaround_reset_end neoverse_n1, ERRATUM(1257314)
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check_erratum_ls neoverse_n1, ERRATUM(1257314), CPU_REV(3, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1262606), ERRATA_N1_1262606
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sysreg_bit_set NEOVERSE_N1_CPUACTLR_EL1, NEOVERSE_N1_CPUACTLR_EL1_BIT_13
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workaround_reset_end neoverse_n1, ERRATUM(1262606)
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check_erratum_ls neoverse_n1, ERRATUM(1262606), CPU_REV(3, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1262888), ERRATA_N1_1262888
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sysreg_bit_set NEOVERSE_N1_CPUECTLR_EL1, NEOVERSE_N1_CPUECTLR_EL1_MM_TLBPF_DIS_BIT
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workaround_reset_end neoverse_n1, ERRATUM(1262888)
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check_erratum_ls neoverse_n1, ERRATUM(1262888), CPU_REV(3, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1275112), ERRATA_N1_1275112
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sysreg_bit_set NEOVERSE_N1_CPUACTLR_EL1, NEOVERSE_N1_CPUACTLR_EL1_BIT_13
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workaround_reset_end neoverse_n1, ERRATUM(1275112)
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check_erratum_ls neoverse_n1, ERRATUM(1275112), CPU_REV(3, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1315703), ERRATA_N1_1315703
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sysreg_bit_set NEOVERSE_N1_CPUACTLR2_EL1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_16
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workaround_reset_end neoverse_n1, ERRATUM(1315703)
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check_erratum_ls neoverse_n1, ERRATUM(1315703), CPU_REV(3, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1542419), ERRATA_N1_1542419
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/* Apply instruction patching sequence */
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ldr x0, =0x0
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msr CPUPSELR_EL3, x0
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ldr x0, =0xEE670D35
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msr CPUPOR_EL3, x0
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ldr x0, =0xFFFF0FFF
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msr CPUPMR_EL3, x0
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ldr x0, =0x08000020007D
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msr CPUPCR_EL3, x0
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isb
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workaround_reset_end neoverse_n1, ERRATUM(1542419)
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check_erratum_range neoverse_n1, ERRATUM(1542419), CPU_REV(3, 0), CPU_REV(4, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1868343), ERRATA_N1_1868343
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sysreg_bit_set NEOVERSE_N1_CPUACTLR_EL1, NEOVERSE_N1_CPUACTLR_EL1_BIT_13
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workaround_reset_end neoverse_n1, ERRATUM(1868343)
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check_erratum_ls neoverse_n1, ERRATUM(1868343), CPU_REV(4, 0)
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workaround_reset_start neoverse_n1, ERRATUM(1946160), ERRATA_N1_1946160
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mov x0, #3
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msr S3_6_C15_C8_0, x0
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ldr x0, =0x10E3900002
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msr S3_6_C15_C8_2, x0
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ldr x0, =0x10FFF00083
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msr S3_6_C15_C8_3, x0
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ldr x0, =0x2001003FF
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msr S3_6_C15_C8_1, x0
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mov x0, #4
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msr S3_6_C15_C8_0, x0
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ldr x0, =0x10E3800082
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msr S3_6_C15_C8_2, x0
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ldr x0, =0x10FFF00083
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msr S3_6_C15_C8_3, x0
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ldr x0, =0x2001003FF
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msr S3_6_C15_C8_1, x0
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mov x0, #5
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msr S3_6_C15_C8_0, x0
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ldr x0, =0x10E3800200
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msr S3_6_C15_C8_2, x0
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ldr x0, =0x10FFF003E0
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msr S3_6_C15_C8_3, x0
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ldr x0, =0x2001003FF
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msr S3_6_C15_C8_1, x0
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isb
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workaround_reset_end neoverse_n1, ERRATUM(1946160)
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check_erratum_range neoverse_n1, ERRATUM(1946160), CPU_REV(3, 0), CPU_REV(4, 1)
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workaround_runtime_start neoverse_n1, ERRATUM(2743102), ERRATA_N1_2743102
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/* dsb before isb of power down sequence */
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dsb sy
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workaround_runtime_end neoverse_n1, ERRATUM(2743102)
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check_erratum_ls neoverse_n1, ERRATUM(2743102), CPU_REV(4, 1)
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workaround_reset_start neoverse_n1, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
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#if IMAGE_BL31
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/*
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* The Neoverse-N1 generic vectors are overridden to apply errata
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* mitigation on exception entry from lower ELs.
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*/
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override_vector_table wa_cve_vbar_neoverse_n1
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#endif /* IMAGE_BL31 */
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workaround_reset_end neoverse_n1, CVE(2022, 23960)
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check_erratum_chosen neoverse_n1, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
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/* --------------------------------------------------
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* Disable speculative loads if Neoverse N1 supports
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@ -81,521 +202,18 @@ func neoverse_n1_disable_speculative_loads
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ret
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endfunc neoverse_n1_disable_speculative_loads
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|
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/* --------------------------------------------------
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* Errata Workaround for Neoverse N1 Errata #1073348
|
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* This applies to revision r0p0 and r1p0 of Neoverse N1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_n1_1073348_wa
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/* Compare x0 against revision r1p0 */
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mov x17, x30
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bl check_errata_1073348
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUACTLR_EL1
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orr x1, x1, NEOVERSE_N1_CPUACTLR_EL1_BIT_6
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msr NEOVERSE_N1_CPUACTLR_EL1, x1
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1:
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ret x17
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endfunc errata_n1_1073348_wa
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func check_errata_1073348
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/* Applies to r0p0 and r1p0 */
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mov x1, #0x10
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b cpu_rev_var_ls
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endfunc check_errata_1073348
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|
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/* --------------------------------------------------
|
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* Errata Workaround for Neoverse N1 Errata #1130799
|
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* This applies to revision <=r2p0 of Neoverse N1.
|
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* Inputs:
|
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
|
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* --------------------------------------------------
|
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*/
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func errata_n1_1130799_wa
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/* Compare x0 against revision r2p0 */
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mov x17, x30
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bl check_errata_1130799
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUACTLR2_EL1
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orr x1, x1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_59
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msr NEOVERSE_N1_CPUACTLR2_EL1, x1
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1:
|
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ret x17
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endfunc errata_n1_1130799_wa
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|
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func check_errata_1130799
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/* Applies to <=r2p0 */
|
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mov x1, #0x20
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b cpu_rev_var_ls
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endfunc check_errata_1130799
|
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|
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/* --------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Errata #1165347
|
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* This applies to revision <=r2p0 of Neoverse N1.
|
||||
* Inputs:
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* --------------------------------------------------
|
||||
*/
|
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func errata_n1_1165347_wa
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/* Compare x0 against revision r2p0 */
|
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mov x17, x30
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bl check_errata_1165347
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cbz x0, 1f
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mrs x1, NEOVERSE_N1_CPUACTLR2_EL1
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orr x1, x1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_0
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orr x1, x1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_15
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msr NEOVERSE_N1_CPUACTLR2_EL1, x1
|
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1:
|
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ret x17
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endfunc errata_n1_1165347_wa
|
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|
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func check_errata_1165347
|
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/* Applies to <=r2p0 */
|
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mov x1, #0x20
|
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b cpu_rev_var_ls
|
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endfunc check_errata_1165347
|
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|
||||
/* --------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Errata #1207823
|
||||
* This applies to revision <=r2p0 of Neoverse N1.
|
||||
* Inputs:
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* --------------------------------------------------
|
||||
*/
|
||||
func errata_n1_1207823_wa
|
||||
/* Compare x0 against revision r2p0 */
|
||||
mov x17, x30
|
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bl check_errata_1207823
|
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cbz x0, 1f
|
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mrs x1, NEOVERSE_N1_CPUACTLR2_EL1
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orr x1, x1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_11
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msr NEOVERSE_N1_CPUACTLR2_EL1, x1
|
||||
1:
|
||||
ret x17
|
||||
endfunc errata_n1_1207823_wa
|
||||
|
||||
func check_errata_1207823
|
||||
/* Applies to <=r2p0 */
|
||||
mov x1, #0x20
|
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b cpu_rev_var_ls
|
||||
endfunc check_errata_1207823
|
||||
|
||||
/* --------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Errata #1220197
|
||||
* This applies to revision <=r2p0 of Neoverse N1.
|
||||
* Inputs:
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* --------------------------------------------------
|
||||
*/
|
||||
func errata_n1_1220197_wa
|
||||
/* Compare x0 against revision r2p0 */
|
||||
mov x17, x30
|
||||
bl check_errata_1220197
|
||||
cbz x0, 1f
|
||||
mrs x1, NEOVERSE_N1_CPUECTLR_EL1
|
||||
orr x1, x1, NEOVERSE_N1_WS_THR_L2_MASK
|
||||
msr NEOVERSE_N1_CPUECTLR_EL1, x1
|
||||
1:
|
||||
ret x17
|
||||
endfunc errata_n1_1220197_wa
|
||||
|
||||
func check_errata_1220197
|
||||
/* Applies to <=r2p0 */
|
||||
mov x1, #0x20
|
||||
b cpu_rev_var_ls
|
||||
endfunc check_errata_1220197
|
||||
|
||||
/* --------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Errata #1257314
|
||||
* This applies to revision <=r3p0 of Neoverse N1.
|
||||
* Inputs:
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* --------------------------------------------------
|
||||
*/
|
||||
func errata_n1_1257314_wa
|
||||
/* Compare x0 against revision r3p0 */
|
||||
mov x17, x30
|
||||
bl check_errata_1257314
|
||||
cbz x0, 1f
|
||||
mrs x1, NEOVERSE_N1_CPUACTLR3_EL1
|
||||
orr x1, x1, NEOVERSE_N1_CPUACTLR3_EL1_BIT_10
|
||||
msr NEOVERSE_N1_CPUACTLR3_EL1, x1
|
||||
1:
|
||||
ret x17
|
||||
endfunc errata_n1_1257314_wa
|
||||
|
||||
func check_errata_1257314
|
||||
/* Applies to <=r3p0 */
|
||||
mov x1, #0x30
|
||||
b cpu_rev_var_ls
|
||||
endfunc check_errata_1257314
|
||||
|
||||
/* --------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Errata #1262606
|
||||
* This applies to revision <=r3p0 of Neoverse N1.
|
||||
* Inputs:
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* --------------------------------------------------
|
||||
*/
|
||||
func errata_n1_1262606_wa
|
||||
/* Compare x0 against revision r3p0 */
|
||||
mov x17, x30
|
||||
bl check_errata_1262606
|
||||
cbz x0, 1f
|
||||
mrs x1, NEOVERSE_N1_CPUACTLR_EL1
|
||||
orr x1, x1, NEOVERSE_N1_CPUACTLR_EL1_BIT_13
|
||||
msr NEOVERSE_N1_CPUACTLR_EL1, x1
|
||||
1:
|
||||
ret x17
|
||||
endfunc errata_n1_1262606_wa
|
||||
|
||||
func check_errata_1262606
|
||||
/* Applies to <=r3p0 */
|
||||
mov x1, #0x30
|
||||
b cpu_rev_var_ls
|
||||
endfunc check_errata_1262606
|
||||
|
||||
/* --------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Errata #1262888
|
||||
* This applies to revision <=r3p0 of Neoverse N1.
|
||||
* Inputs:
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* --------------------------------------------------
|
||||
*/
|
||||
func errata_n1_1262888_wa
|
||||
/* Compare x0 against revision r3p0 */
|
||||
mov x17, x30
|
||||
bl check_errata_1262888
|
||||
cbz x0, 1f
|
||||
mrs x1, NEOVERSE_N1_CPUECTLR_EL1
|
||||
orr x1, x1, NEOVERSE_N1_CPUECTLR_EL1_MM_TLBPF_DIS_BIT
|
||||
msr NEOVERSE_N1_CPUECTLR_EL1, x1
|
||||
1:
|
||||
ret x17
|
||||
endfunc errata_n1_1262888_wa
|
||||
|
||||
func check_errata_1262888
|
||||
/* Applies to <=r3p0 */
|
||||
mov x1, #0x30
|
||||
b cpu_rev_var_ls
|
||||
endfunc check_errata_1262888
|
||||
|
||||
/* --------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Errata #1275112
|
||||
* This applies to revision <=r3p0 of Neoverse N1.
|
||||
* Inputs:
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* --------------------------------------------------
|
||||
*/
|
||||
func errata_n1_1275112_wa
|
||||
/* Compare x0 against revision r3p0 */
|
||||
mov x17, x30
|
||||
bl check_errata_1275112
|
||||
cbz x0, 1f
|
||||
mrs x1, NEOVERSE_N1_CPUACTLR_EL1
|
||||
orr x1, x1, NEOVERSE_N1_CPUACTLR_EL1_BIT_13
|
||||
msr NEOVERSE_N1_CPUACTLR_EL1, x1
|
||||
1:
|
||||
ret x17
|
||||
endfunc errata_n1_1275112_wa
|
||||
|
||||
func check_errata_1275112
|
||||
/* Applies to <=r3p0 */
|
||||
mov x1, #0x30
|
||||
b cpu_rev_var_ls
|
||||
endfunc check_errata_1275112
|
||||
|
||||
/* --------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Erratum 1315703.
|
||||
* This applies to revision <= r3p0 of Neoverse N1.
|
||||
* Inputs:
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* --------------------------------------------------
|
||||
*/
|
||||
func errata_n1_1315703_wa
|
||||
/* Compare x0 against revision r3p1 */
|
||||
mov x17, x30
|
||||
bl check_errata_1315703
|
||||
cbz x0, 1f
|
||||
|
||||
mrs x0, NEOVERSE_N1_CPUACTLR2_EL1
|
||||
orr x0, x0, #NEOVERSE_N1_CPUACTLR2_EL1_BIT_16
|
||||
msr NEOVERSE_N1_CPUACTLR2_EL1, x0
|
||||
|
||||
1:
|
||||
ret x17
|
||||
endfunc errata_n1_1315703_wa
|
||||
|
||||
func check_errata_1315703
|
||||
/* Applies to everything <= r3p0. */
|
||||
mov x1, #0x30
|
||||
b cpu_rev_var_ls
|
||||
endfunc check_errata_1315703
|
||||
|
||||
/* --------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Erratum 1542419.
|
||||
* This applies to revisions r3p0 - r4p0 of Neoverse N1
|
||||
* Inputs:
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* --------------------------------------------------
|
||||
*/
|
||||
func errata_n1_1542419_wa
|
||||
/* Compare x0 against revision r3p0 and r4p0 */
|
||||
mov x17, x30
|
||||
bl check_errata_1542419
|
||||
cbz x0, 1f
|
||||
|
||||
/* Apply instruction patching sequence */
|
||||
ldr x0, =0x0
|
||||
msr CPUPSELR_EL3, x0
|
||||
ldr x0, =0xEE670D35
|
||||
msr CPUPOR_EL3, x0
|
||||
ldr x0, =0xFFFF0FFF
|
||||
msr CPUPMR_EL3, x0
|
||||
ldr x0, =0x08000020007D
|
||||
msr CPUPCR_EL3, x0
|
||||
isb
|
||||
1:
|
||||
ret x17
|
||||
endfunc errata_n1_1542419_wa
|
||||
|
||||
func check_errata_1542419
|
||||
/* Applies to everything r3p0 - r4p0. */
|
||||
mov x1, #0x30
|
||||
mov x2, #0x40
|
||||
b cpu_rev_var_range
|
||||
endfunc check_errata_1542419
|
||||
|
||||
/* --------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Errata #1868343.
|
||||
* This applies to revision <= r4p0 of Neoverse N1.
|
||||
* This workaround is the same as the workaround for
|
||||
* errata 1262606 and 1275112 but applies to a wider
|
||||
* revision range.
|
||||
* Inputs:
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* --------------------------------------------------
|
||||
*/
|
||||
func errata_n1_1868343_wa
|
||||
/*
|
||||
* Compare x0 against revision r4p0
|
||||
*/
|
||||
mov x17, x30
|
||||
bl check_errata_1868343
|
||||
cbz x0, 1f
|
||||
mrs x1, NEOVERSE_N1_CPUACTLR_EL1
|
||||
orr x1, x1, NEOVERSE_N1_CPUACTLR_EL1_BIT_13
|
||||
msr NEOVERSE_N1_CPUACTLR_EL1, x1
|
||||
isb
|
||||
1:
|
||||
ret x17
|
||||
endfunc errata_n1_1868343_wa
|
||||
|
||||
func check_errata_1868343
|
||||
/* Applies to everything <= r4p0 */
|
||||
mov x1, #0x40
|
||||
b cpu_rev_var_ls
|
||||
endfunc check_errata_1868343
|
||||
|
||||
/* --------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Errata #1946160.
|
||||
* This applies to revisions r3p0, r3p1, r4p0, and
|
||||
* r4p1 of Neoverse N1. It also exists in r0p0, r1p0,
|
||||
* and r2p0 but there is no fix in these revisions.
|
||||
* Inputs:
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* --------------------------------------------------
|
||||
*/
|
||||
func errata_n1_1946160_wa
|
||||
/*
|
||||
* Compare x0 against r3p0 - r4p1
|
||||
*/
|
||||
mov x17, x30
|
||||
bl check_errata_1946160
|
||||
cbz x0, 1f
|
||||
|
||||
mov x0, #3
|
||||
msr S3_6_C15_C8_0, x0
|
||||
ldr x0, =0x10E3900002
|
||||
msr S3_6_C15_C8_2, x0
|
||||
ldr x0, =0x10FFF00083
|
||||
msr S3_6_C15_C8_3, x0
|
||||
ldr x0, =0x2001003FF
|
||||
msr S3_6_C15_C8_1, x0
|
||||
|
||||
mov x0, #4
|
||||
msr S3_6_C15_C8_0, x0
|
||||
ldr x0, =0x10E3800082
|
||||
msr S3_6_C15_C8_2, x0
|
||||
ldr x0, =0x10FFF00083
|
||||
msr S3_6_C15_C8_3, x0
|
||||
ldr x0, =0x2001003FF
|
||||
msr S3_6_C15_C8_1, x0
|
||||
|
||||
mov x0, #5
|
||||
msr S3_6_C15_C8_0, x0
|
||||
ldr x0, =0x10E3800200
|
||||
msr S3_6_C15_C8_2, x0
|
||||
ldr x0, =0x10FFF003E0
|
||||
msr S3_6_C15_C8_3, x0
|
||||
ldr x0, =0x2001003FF
|
||||
msr S3_6_C15_C8_1, x0
|
||||
|
||||
isb
|
||||
1:
|
||||
ret x17
|
||||
endfunc errata_n1_1946160_wa
|
||||
|
||||
func check_errata_1946160
|
||||
/* Applies to r3p0 - r4p1. */
|
||||
mov x1, #0x30
|
||||
mov x2, #0x41
|
||||
b cpu_rev_var_range
|
||||
endfunc check_errata_1946160
|
||||
|
||||
/* ----------------------------------------------------
|
||||
* Errata Workaround for Neoverse N1 Errata #2743102
|
||||
* This applies to revisions <= r4p1 and is still open.
|
||||
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||
* Shall clobber: x0-x17
|
||||
* ----------------------------------------------------
|
||||
*/
|
||||
func errata_n1_2743102_wa
|
||||
mov x17, x30
|
||||
bl check_errata_2743102
|
||||
cbz x0, 1f
|
||||
|
||||
/* dsb before isb of power down sequence */
|
||||
dsb sy
|
||||
1:
|
||||
ret x17
|
||||
endfunc errata_n1_2743102_wa
|
||||
|
||||
func check_errata_2743102
|
||||
/* Applies to all revisions <= r4p1 */
|
||||
mov x1, #0x41
|
||||
b cpu_rev_var_ls
|
||||
endfunc check_errata_2743102
|
||||
|
||||
func check_errata_cve_2022_23960
|
||||
#if WORKAROUND_CVE_2022_23960
|
||||
mov x0, #ERRATA_APPLIES
|
||||
#else
|
||||
mov x0, #ERRATA_MISSING
|
||||
#endif
|
||||
ret
|
||||
endfunc check_errata_cve_2022_23960
|
||||
|
||||
func neoverse_n1_reset_func
|
||||
mov x19, x30
|
||||
|
||||
cpu_reset_func_start neoverse_n1
|
||||
bl neoverse_n1_disable_speculative_loads
|
||||
|
||||
/* Forces all cacheable atomic instructions to be near */
|
||||
mrs x0, NEOVERSE_N1_CPUACTLR2_EL1
|
||||
orr x0, x0, #NEOVERSE_N1_CPUACTLR2_EL1_BIT_2
|
||||
msr NEOVERSE_N1_CPUACTLR2_EL1, x0
|
||||
sysreg_bit_set NEOVERSE_N1_CPUACTLR2_EL1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_2
|
||||
isb
|
||||
|
||||
bl cpu_get_rev_var
|
||||
mov x18, x0
|
||||
|
||||
#if ERRATA_N1_1043202
|
||||
mov x0, x18
|
||||
bl errata_n1_1043202_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1073348
|
||||
mov x0, x18
|
||||
bl errata_n1_1073348_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1130799
|
||||
mov x0, x18
|
||||
bl errata_n1_1130799_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1165347
|
||||
mov x0, x18
|
||||
bl errata_n1_1165347_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1207823
|
||||
mov x0, x18
|
||||
bl errata_n1_1207823_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1220197
|
||||
mov x0, x18
|
||||
bl errata_n1_1220197_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1257314
|
||||
mov x0, x18
|
||||
bl errata_n1_1257314_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1262606
|
||||
mov x0, x18
|
||||
bl errata_n1_1262606_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1262888
|
||||
mov x0, x18
|
||||
bl errata_n1_1262888_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1275112
|
||||
mov x0, x18
|
||||
bl errata_n1_1275112_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1315703
|
||||
mov x0, x18
|
||||
bl errata_n1_1315703_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1542419
|
||||
mov x0, x18
|
||||
bl errata_n1_1542419_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1868343
|
||||
mov x0, x18
|
||||
bl errata_n1_1868343_wa
|
||||
#endif
|
||||
|
||||
#if ERRATA_N1_1946160
|
||||
mov x0, x18
|
||||
bl errata_n1_1946160_wa
|
||||
#endif
|
||||
|
||||
#if ENABLE_FEAT_AMU
|
||||
/* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
|
||||
mrs x0, actlr_el3
|
||||
orr x0, x0, #NEOVERSE_N1_ACTLR_AMEN_BIT
|
||||
msr actlr_el3, x0
|
||||
|
||||
sysreg_bit_set actlr_el3, NEOVERSE_N1_ACTLR_AMEN_BIT
|
||||
/* Make sure accesses from EL0/EL1 are not trapped to EL2 */
|
||||
mrs x0, actlr_el2
|
||||
orr x0, x0, #NEOVERSE_N1_ACTLR_AMEN_BIT
|
||||
msr actlr_el2, x0
|
||||
|
||||
sysreg_bit_set actlr_el2, NEOVERSE_N1_ACTLR_AMEN_BIT
|
||||
/* Enable group0 counters */
|
||||
mov x0, #NEOVERSE_N1_AMU_GROUP0_MASK
|
||||
msr CPUAMCNTENSET_EL0, x0
|
||||
|
|
@ -603,27 +221,9 @@ func neoverse_n1_reset_func
|
|||
|
||||
#if NEOVERSE_Nx_EXTERNAL_LLC
|
||||
/* Some system may have External LLC, core needs to be made aware */
|
||||
mrs x0, NEOVERSE_N1_CPUECTLR_EL1
|
||||
orr x0, x0, NEOVERSE_N1_CPUECTLR_EL1_EXTLLC_BIT
|
||||
msr NEOVERSE_N1_CPUECTLR_EL1, x0
|
||||
sysreg_bit_set NEOVERSE_N1_CPUECTLR_EL1, NEOVERSE_N1_CPUECTLR_EL1_EXTLLC_BIT
|
||||
#endif
|
||||
|
||||
#if ERRATA_DSU_936184
|
||||
bl errata_dsu_936184_wa
|
||||
#endif
|
||||
|
||||
#if IMAGE_BL31 && WORKAROUND_CVE_2022_23960
|
||||
/*
|
||||
* The Neoverse-N1 generic vectors are overridden to apply errata
|
||||
* mitigation on exception entry from lower ELs.
|
||||
*/
|
||||
adr x0, wa_cve_vbar_neoverse_n1
|
||||
msr vbar_el3, x0
|
||||
#endif /* IMAGE_BL31 && WORKAROUND_CVE_2022_23960 */
|
||||
|
||||
isb
|
||||
ret x19
|
||||
endfunc neoverse_n1_reset_func
|
||||
cpu_reset_func_end neoverse_n1
|
||||
|
||||
/* ---------------------------------------------
|
||||
* HW will do the cache maintenance while powering down
|
||||
|
|
@ -634,55 +234,15 @@ func neoverse_n1_core_pwr_dwn
|
|||
* Enable CPU power down bit in power control register
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
mrs x0, NEOVERSE_N1_CPUPWRCTLR_EL1
|
||||
orr x0, x0, #NEOVERSE_N1_CORE_PWRDN_EN_MASK
|
||||
msr NEOVERSE_N1_CPUPWRCTLR_EL1, x0
|
||||
#if ERRATA_N1_2743102
|
||||
mov x15, x30
|
||||
bl cpu_get_rev_var
|
||||
bl errata_n1_2743102_wa
|
||||
mov x30, x15
|
||||
#endif /* ERRATA_N1_2743102 */
|
||||
sysreg_bit_set NEOVERSE_N1_CPUPWRCTLR_EL1, NEOVERSE_N1_CORE_PWRDN_EN_MASK
|
||||
|
||||
apply_erratum neoverse_n1, ERRATUM(2743102), ERRATA_N1_2743102
|
||||
|
||||
isb
|
||||
ret
|
||||
endfunc neoverse_n1_core_pwr_dwn
|
||||
|
||||
#if REPORT_ERRATA
|
||||
/*
|
||||
* Errata printing function for Neoverse N1. Must follow AAPCS.
|
||||
*/
|
||||
func neoverse_n1_errata_report
|
||||
stp x8, x30, [sp, #-16]!
|
||||
|
||||
bl cpu_get_rev_var
|
||||
mov x8, x0
|
||||
|
||||
/*
|
||||
* Report all errata. The revision-variant information is passed to
|
||||
* checking functions of each errata.
|
||||
*/
|
||||
report_errata ERRATA_N1_1043202, neoverse_n1, 1043202
|
||||
report_errata ERRATA_N1_1073348, neoverse_n1, 1073348
|
||||
report_errata ERRATA_N1_1130799, neoverse_n1, 1130799
|
||||
report_errata ERRATA_N1_1165347, neoverse_n1, 1165347
|
||||
report_errata ERRATA_N1_1207823, neoverse_n1, 1207823
|
||||
report_errata ERRATA_N1_1220197, neoverse_n1, 1220197
|
||||
report_errata ERRATA_N1_1257314, neoverse_n1, 1257314
|
||||
report_errata ERRATA_N1_1262606, neoverse_n1, 1262606
|
||||
report_errata ERRATA_N1_1262888, neoverse_n1, 1262888
|
||||
report_errata ERRATA_N1_1275112, neoverse_n1, 1275112
|
||||
report_errata ERRATA_N1_1315703, neoverse_n1, 1315703
|
||||
report_errata ERRATA_N1_1542419, neoverse_n1, 1542419
|
||||
report_errata ERRATA_N1_1868343, neoverse_n1, 1868343
|
||||
report_errata ERRATA_N1_1946160, neoverse_n1, 1946160
|
||||
report_errata ERRATA_N1_2743102, neoverse_n1, 2743102
|
||||
report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184
|
||||
report_errata WORKAROUND_CVE_2022_23960, neoverse_n1, cve_2022_23960
|
||||
|
||||
ldp x8, x30, [sp], #16
|
||||
ret
|
||||
endfunc neoverse_n1_errata_report
|
||||
#endif
|
||||
errata_report_shim neoverse_n1
|
||||
|
||||
/*
|
||||
* Handle trap of EL0 IC IVAU instructions to EL3 by executing a TLB
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue