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docs(spm): update FF-A manifest binding
- Add security state attribute to memory and device regions. - Rename device region reg attribution to base-address aligned with memory regions. - Add pages-count field to device regions. - Refresh interrupt attributes description in device regions. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I901f48d410edb8b10f65bb35398b80f18105e427
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@ -4,11 +4,8 @@ FF-A manifest binding to device tree
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This document defines the nodes and properties used to define a partition,
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according to the FF-A specification.
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Version 1.0
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-----------
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Partition Properties
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^^^^^^^^^^^^^^^^^^^^
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--------------------
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- compatible [mandatory]
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- value type: <string>
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@ -184,13 +181,14 @@ Memory Regions
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- 0x1: Read
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- 0x2: Write
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- 0x4: Execute
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- 0x8: Security state
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- base-address
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- value type: <u64>
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- Base address of the region. The address must be aligned to the translation
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granule size.
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The address given may be a Physical Address (PA), Virtual Address (VA), or
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Intermediate Physical Address (IPA). Refer to the FFA specification for
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Intermediate Physical Address (IPA). Refer to the FF-A specification for
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more information on the restrictions around the address type.
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If the base address is omitted then the partition manager must map a memory
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region of the specified size into the partition's translation regime and
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@ -208,14 +206,10 @@ Device Regions
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- value type: <string>
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- Name of the device region e.g. for debugging purposes.
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- reg [mandatory]
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- value type: <prop-encoded-array>
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- A (address, num-pages) pair describing the device, where:
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- address: The physical base address <u64> value of the device MMIO
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region.
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- num-pages: The <u32> number of pages of the region. The total size of
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the region is this value multiplied by the translation granule size.
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- pages-count [mandatory]
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- value type: <u32>
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- Count of pages of memory region as a multiple of the translation granule
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size
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- attributes [mandatory]
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- value type: <u32>
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@ -224,6 +218,15 @@ Device Regions
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- 0x1: Read
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- 0x2: Write
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- 0x4: Execute
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- 0x8: Security state
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- base-address [mandatory]
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- value type: <u64>
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- Base address of the region. The address must be aligned to the translation
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granule size.
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The address given may be a Physical Address (PA), Virtual Address (VA), or
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Intermediate Physical Address (IPA). Refer to the FF-A specification for
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more information on the restrictions around the address type.
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- smmu-id
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- value type: <u32>
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@ -243,14 +246,32 @@ Device Regions
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- A list of (id, attributes) pair describing the device interrupts, where:
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- id: The <u32> interrupt IDs.
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- attributes: A <u32> value,
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containing the attributes for each interrupt ID:
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- attributes: A <u32> value, containing attributes for each interrupt ID:
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- Interrupt type: SPI, PPI, SGI
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- Interrupt configuration: Edge triggered, Level triggered
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- Interrupt security state: Secure, Non-secure
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- Interrupt priority value
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- Target execution context/vCPU for each SPI
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+----------------------+----------+
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|Field | Bit(s) |
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+----------------------+----------+
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| Priority | 7:0 |
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+----------------------+----------+
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| Security state | 8 |
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+----------------------+----------+
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| Config(Edge/Level) | 9 |
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+----------------------+----------+
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| Type(SPI/PPI/SGI) | 11:10 |
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+----------------------+----------+
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Security state:
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- Secure: 1
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- Non-secure: 0
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Configuration:
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- Edge triggered: 0
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- Level triggered: 1
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Type:
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- SPI: 0b10
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- PPI: 0b01
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- SGI: 0b00
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- exclusive-access
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- value type: <empty>
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@ -259,4 +280,4 @@ Device Regions
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--------------
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*Copyright (c) 2019-2021, Arm Limited and Contributors. All rights reserved.*
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*Copyright (c) 2019-2022, Arm Limited and Contributors. All rights reserved.*
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