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feat(layerscape): add new soc errata a009660 support

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Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ice37155d971dec5c610026043e34b64f761fc1b7
This commit is contained in:
Jiafei Pan 2022-02-18 18:30:05 +08:00
parent f2de48cb14
commit 785ee93cc3
4 changed files with 27 additions and 4 deletions
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6
plat/nxp/common/soc_errata/errata.c
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@ -1,5 +1,5 @@
/*
* Copyright 2021 NXP
* Copyright 2021-2022 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -18,6 +18,10 @@ void soc_errata(void)
#ifdef ERRATA_SOC_A008850
INFO("SoC workaround for Errata A008850 Early-Phase was applied\n");
erratum_a008850_early();
#endif
#if ERRATA_SOC_A009660
INFO("SoC workaround for Errata A009660 was applied\n");
erratum_a009660();
#endif
/*
* The following DDR Erratas workaround are implemented in DDR driver,

5
plat/nxp/common/soc_errata/errata.mk
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@ -1,5 +1,5 @@
#
# Copyright 2021 NXP
# Copyright 2021-2022 NXP
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -9,7 +9,8 @@
ERRATA := \
ERRATA_SOC_A050426 \
ERRATA_SOC_A008850
ERRATA_SOC_A008850 \
ERRATA_SOC_A009660
define enable_errata
$(1) ?= 0

14
plat/nxp/common/soc_errata/errata_a009660.c Normal file
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@ -0,0 +1,14 @@
/*
* Copyright 2022 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#include <mmio.h>
#include <soc_default_base_addr.h>
void erratum_a009660(void)
{
mmio_write_32(NXP_SCFG_ADDR + 0x20c, 0x63b20042);
}

6
plat/nxp/common/soc_errata/errata_list.h
View file

@ -1,5 +1,5 @@
/*
* Copyright 2021 NXP
* Copyright 2021-2022 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -17,4 +17,8 @@ void erratum_a008850_early(void);
void erratum_a008850_post(void);
#endif
#ifdef ERRATA_SOC_A009660
void erratum_a009660(void);
#endif
#endif /* ERRATA_LIST_H */