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ARM platforms: Provide SDEI entry point validation
Provide a strong definition for plat_sdei_validate_sdei_entrypoint() which translates client address to Physical Address, and then validating the address to be present in DRAM. Change-Id: Ib93eb66b413d638aa5524d1b3de36aa16d38ea11 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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3 changed files with 55 additions and 0 deletions
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@ -598,4 +598,10 @@
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#define MAKE_MAIR_NORMAL_MEMORY(inner, outer) ((inner) | ((outer) << MAIR_NORM_OUTER_SHIFT))
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#define MAKE_MAIR_NORMAL_MEMORY(inner, outer) ((inner) | ((outer) << MAIR_NORM_OUTER_SHIFT))
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/* PAR_EL1 fields */
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#define PAR_F_SHIFT 0
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#define PAR_F_MASK 1
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#define PAR_ADDR_SHIFT 12
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#define PAR_ADDR_MASK (BIT(40) - 1) /* 40-bits-wide page address */
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#endif /* __ARCH_H__ */
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#endif /* __ARCH_H__ */
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@ -155,6 +155,7 @@ DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1r)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1w)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1w)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0r)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0r)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0w)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0w)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s1e2r)
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void flush_dcache_range(uintptr_t addr, size_t size);
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void flush_dcache_range(uintptr_t addr, size_t size);
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void clean_dcache_range(uintptr_t addr, size_t size);
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void clean_dcache_range(uintptr_t addr, size_t size);
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@ -204,3 +204,51 @@ unsigned int plat_get_syscnt_freq2(void)
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}
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}
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#endif /* ARM_SYS_CNTCTL_BASE */
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#endif /* ARM_SYS_CNTCTL_BASE */
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#if SDEI_SUPPORT
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/*
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* Translate SDEI entry point to PA, and perform standard ARM entry point
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* validation on it.
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*/
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int plat_sdei_validate_entry_point(uintptr_t ep, unsigned int client_mode)
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{
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uint64_t par, pa;
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uint32_t scr_el3;
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/* Doing Non-secure address translation requires SCR_EL3.NS set */
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scr_el3 = read_scr_el3();
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write_scr_el3(scr_el3 | SCR_NS_BIT);
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isb();
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assert((client_mode == MODE_EL2) || (client_mode == MODE_EL1));
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if (client_mode == MODE_EL2) {
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/*
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* Translate entry point to Physical Address using the EL2
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* translation regime.
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*/
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ats1e2r(ep);
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} else {
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/*
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* Translate entry point to Physical Address using the EL1&0
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* translation regime, including stage 2.
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*/
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ats12e1r(ep);
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}
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isb();
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par = read_par_el1();
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/* Restore original SCRL_EL3 */
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write_scr_el3(scr_el3);
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isb();
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/* If the translation resulted in fault, return failure */
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if ((par & PAR_F_MASK) != 0)
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return -1;
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/* Extract Physical Address from PAR */
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pa = (par & (PAR_ADDR_MASK << PAR_ADDR_SHIFT));
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/* Perform NS entry point validation on the physical address */
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return arm_validate_ns_entrypoint(pa);
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}
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#endif
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