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fix(st): enable RTC clock before accessing nv counter

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The plat_get_nv_ctr() retrieves the non-volatile counter value from
TAMP_COUNTR register in RTCTAMP peripheral. The clock needs to be
enabled before accessing it.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I2e9fc2c7ac516d6f8624cc6c9d442ee85629bf9a
This commit is contained in:
Yann Gautier 2023-01-17 09:29:54 +01:00 • committed by Yann Gautier
parent 379d77b370
commit 77ce6a561e
1 changed files with 5 additions and 0 deletions
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5
plat/st/common/stm32mp_trusted_boot.c
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@ -10,6 +10,7 @@
#include <common/debug.h> #include <common/debug.h>
#include <common/tbbr/cot_def.h> #include <common/tbbr/cot_def.h>
#include <drivers/clk.h>
#include <drivers/st/stm32_hash.h> #include <drivers/st/stm32_hash.h>
#include <lib/fconf/fconf.h> #include <lib/fconf/fconf.h>
#include <lib/fconf/fconf_dyn_cfg_getter.h> #include <lib/fconf/fconf_dyn_cfg_getter.h>
@ -171,16 +172,20 @@ int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len,
int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr)
{ {
clk_enable(TAMP_BKP_REG_CLK);
*nv_ctr = mmio_read_32(TAMP_BASE + TAMP_COUNTR); *nv_ctr = mmio_read_32(TAMP_BASE + TAMP_COUNTR);
clk_disable(TAMP_BKP_REG_CLK);
return 0; return 0;
} }
int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr)
{ {
clk_enable(TAMP_BKP_REG_CLK);
while (mmio_read_32(TAMP_BASE + TAMP_COUNTR) != nv_ctr) { while (mmio_read_32(TAMP_BASE + TAMP_COUNTR) != nv_ctr) {
mmio_write_32(TAMP_BASE + TAMP_COUNTR, 1U); mmio_write_32(TAMP_BASE + TAMP_COUNTR, 1U);
} }
clk_disable(TAMP_BKP_REG_CLK);
return 0; return 0;
} }