Merge "feat(cpufeat): add cortex-a35 l2 extended control register" into integration

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Manish V Badarkhe 2024-01-26 16:38:39 +01:00 committed by TrustedFirmware Code Review
commit 772981cff4

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2019, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -12,6 +12,9 @@
/* Cortex-A35 Main ID register for revision 0 */
#define CORTEX_A35_MIDR U(0x410FD040)
/* L2 Extended Control Register */
#define CORTEX_A35_L2ECTLR_EL1 S3_1_C11_C0_3
/*******************************************************************************
* CPU Extended Control register specific definitions.
* CPUECTLR_EL1 is an implementation-specific register.