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Tegra: gicv2: initialize target masks

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This patch initializes the target masks in the GICv2 driver
data, for all PEs. This will allow platforms to set the PE
target for SPIs.

Change-Id: I7bf2ad79c04c2555ab310acba17823fb157327a3
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
This commit is contained in:
Varun Wadekar 2018-10-05 11:24:54 -07:00
parent bd0c2f8d99
commit 7644e2aa6e
1 changed files with 8 additions and 1 deletions
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9
plat/nvidia/tegra/common/tegra_gicv2.c
View file

@ -1,20 +1,23 @@
/* /*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#include <assert.h> #include <assert.h>
#include <platform_def.h> #include <platform_def.h>
#include <common/bl_common.h> #include <common/bl_common.h>
#include <drivers/arm/gicv2.h> #include <drivers/arm/gicv2.h>
#include <lib/utils.h> #include <lib/utils.h>
#include <plat/common/platform.h>
#include <tegra_private.h> #include <tegra_private.h>
#include <tegra_def.h> #include <tegra_def.h>
static unsigned int tegra_target_masks[PLATFORM_CORE_COUNT];
/****************************************************************************** /******************************************************************************
* Tegra common helper to setup the GICv2 driver data. * Tegra common helper to setup the GICv2 driver data.
*****************************************************************************/ *****************************************************************************/
@ -33,6 +36,8 @@ void tegra_gic_setup(const interrupt_prop_t *interrupt_props,
tegra_gic_data.gicc_base = TEGRA_GICC_BASE; tegra_gic_data.gicc_base = TEGRA_GICC_BASE;
tegra_gic_data.interrupt_props = interrupt_props; tegra_gic_data.interrupt_props = interrupt_props;
tegra_gic_data.interrupt_props_num = interrupt_props_num; tegra_gic_data.interrupt_props_num = interrupt_props_num;
tegra_gic_data.target_masks = tegra_target_masks;
tegra_gic_data.target_masks_num = ARRAY_SIZE(tegra_target_masks);
gicv2_driver_init(&tegra_gic_data); gicv2_driver_init(&tegra_gic_data);
} }
@ -43,6 +48,7 @@ void tegra_gic_init(void)
{ {
gicv2_distif_init(); gicv2_distif_init();
gicv2_pcpu_distif_init(); gicv2_pcpu_distif_init();
gicv2_set_pe_target_mask(plat_my_core_pos());
gicv2_cpuif_enable(); gicv2_cpuif_enable();
} }
@ -61,5 +67,6 @@ void tegra_gic_cpuif_deactivate(void)
void tegra_gic_pcpu_init(void) void tegra_gic_pcpu_init(void)
{ {
gicv2_pcpu_distif_init(); gicv2_pcpu_distif_init();
gicv2_set_pe_target_mask(plat_my_core_pos());
gicv2_cpuif_enable(); gicv2_cpuif_enable();
} }