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Merge pull request #1668 from ldts/rcar_gen3/e3_build
rcar_gen3: E3 target: fix compilation issues
This commit is contained in:
commit
7558e85fdb
5 changed files with 18 additions and 7 deletions
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@ -72,9 +72,9 @@ static void swdt_disable(void)
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void rcar_swdt_init(void)
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void rcar_swdt_init(void)
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{
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{
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uint32_t rmsk, val, sr;
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uint32_t rmsk, sr;
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#if (RCAR_LSI != RCAR_E3)
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#if (RCAR_LSI != RCAR_E3)
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uint32_t reg, product_cut, chk_data;
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uint32_t reg, val, product_cut, chk_data;
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reg = mmio_read_32(RCAR_PRR);
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reg = mmio_read_32(RCAR_PRR);
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product_cut = reg & (RCAR_PRODUCT_MASK | RCAR_CUT_MASK);
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product_cut = reg & (RCAR_PRODUCT_MASK | RCAR_CUT_MASK);
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@ -1046,7 +1046,7 @@ uint32_t recovery_from_backup_mode(void)
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} else {
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} else {
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NOTICE("[COLD_BOOT]");
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NOTICE("[COLD_BOOT]");
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} /* ddrBackup */
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} /* ddrBackup */
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err=dram_update_boot_status(ddrBackup);
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err=rcar_dram_update_boot_status(ddrBackup);
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if(err){
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if(err){
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NOTICE("[BOOT_STATUS_UPDATE_ERROR]");
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NOTICE("[BOOT_STATUS_UPDATE_ERROR]");
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return INITDRAM_ERR_I;
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return INITDRAM_ERR_I;
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@ -1500,7 +1500,7 @@ if (pdqsr_ctl == 1){
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/*******************************************************************************
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/*******************************************************************************
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* DDR Initialize entry for IPL
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* DDR Initialize entry for IPL
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******************************************************************************/
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******************************************************************************/
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int32_t InitDram(void)
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int32_t rcar_dram_init(void)
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{
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{
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uint32_t dataL;
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uint32_t dataL;
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uint32_t failcount;
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uint32_t failcount;
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@ -1516,7 +1516,7 @@ int32_t InitDram(void)
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NOTICE("BL2: DDR1856(%s)", RCAR_E3_DDR_VERSION);
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NOTICE("BL2: DDR1856(%s)", RCAR_E3_DDR_VERSION);
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} /* ddr */
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} /* ddr */
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dram_get_boot_status(&ddrBackup);
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rcar_dram_get_boot_status(&ddrBackup);
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if(ddrBackup==DRAM_BOOT_STATUS_WARM){
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if(ddrBackup==DRAM_BOOT_STATUS_WARM){
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dataL=recovery_from_backup_mode(); /* WARM boot */
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dataL=recovery_from_backup_mode(); /* WARM boot */
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@ -24,7 +24,7 @@
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#endif
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#endif
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#endif
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#endif
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extern int32_t InitDram(void);
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extern int32_t rcar_dram_init(void);
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#define INITDRAM_OK (0)
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#define INITDRAM_OK (0)
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#define INITDRAM_NG (0xffffffff)
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#define INITDRAM_NG (0xffffffff)
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#define INITDRAM_ERR_I (0xffffffff)
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#define INITDRAM_ERR_I (0xffffffff)
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@ -19,6 +19,7 @@
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.globl plat_crash_console_init
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.globl plat_crash_console_init
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.globl plat_crash_console_putc
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.globl plat_crash_console_putc
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.globl plat_crash_console_flush
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.globl plat_invalidate_icache
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.globl plat_invalidate_icache
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.globl plat_report_exception
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.globl plat_report_exception
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.globl plat_secondary_reset
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.globl plat_secondary_reset
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@ -286,6 +287,15 @@ func plat_crash_console_putc
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ret
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ret
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endfunc plat_crash_console_putc
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endfunc plat_crash_console_putc
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/* ---------------------------------------------
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* int plat_crash_console_flush()
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*
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* ---------------------------------------------
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*/
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func plat_crash_console_flush
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b console_flush
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endfunc plat_crash_console_flush
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/* --------------------------------------------------------------------
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/* --------------------------------------------------------------------
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* void plat_reset_handler(void);
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* void plat_reset_handler(void);
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*
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*
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@ -42,7 +42,8 @@ static void bl2_secure_cpg_init(void)
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uint32_t stop_cr2, reset_cr2;
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uint32_t stop_cr2, reset_cr2;
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#if (RCAR_LSI == RCAR_E3)
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#if (RCAR_LSI == RCAR_E3)
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reset_cr2 = 0x10000000U stop_cr2 = 0xEFFFFFFFU;
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reset_cr2 = 0x10000000U;
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stop_cr2 = 0xEFFFFFFFU;
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#else
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#else
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reset_cr2 = 0x14000000U;
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reset_cr2 = 0x14000000U;
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stop_cr2 = 0xEBFFFFFFU;
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stop_cr2 = 0xEBFFFFFFU;
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