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Merge "fix(nuvoton): prevent changing clock frequency" into integration

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This commit is contained in:
Madhukar Pappireddy 2024-04-01 16:07:01 +02:00 • committed by TrustedFirmware Code Review
commit 753da8ce45
2 changed files with 4 additions and 16 deletions
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5
include/plat/nuvoton/npcm845x/platform_def.h
View file

@ -132,11 +132,6 @@
*/
#define PLAT_ARM_NS_IMAGE_BASE (ARM_DRAM1_BASE + UL(0x6208000))
#ifdef NPCM845X_DEBUG
#define COUNTER_FREQUENCY 0x07735940 /* f/4 = 125MHz */
#endif /* NPCM845X_DEBUG */
#define COUNTER_FREQUENCY 0x0EE6B280 /* f/2 = 250MHz */
#define PLAT_ARM_NSTIMER_FRAME_ID U(1)
/* GIC parameters */

15
plat/nuvoton/npcm845x/npcm845x_bl31_setup.c
View file

@ -117,7 +117,10 @@ int board_uart_init(void)
unsigned int plat_get_syscnt_freq2(void)
{
return (unsigned int)COUNTER_FREQUENCY;
/*
* Do not overwrite the value set by BootBlock
*/
return (unsigned int)read_cntfrq_el0();
}
/******************************************************************************
@ -324,23 +327,13 @@ void __init npcm845x_bl31_plat_arch_setup(void)
{
const mmap_region_t bl_regions[] = {
MAP_BL31_TOTAL,
#if RECLAIM_INIT_CODE
MAP_BL_INIT_CODE_NOT_USED,
#endif /* RECLAIM_INIT_CODE */
ARM_MAP_BL_RO,
#if USE_COHERENT_MEM
ARM_MAP_BL_COHERENT_RAM,
#endif /* USE_COHERENT_MEM */
ARM_MAP_SHARED_RAM,
#ifdef SECONDARY_BRINGUP
ARM_MAP_NS_DRAM1_NO_USED,
#ifdef BL32_BASE
ARM_MAP_BL32_CORE_MEM_NO_USED
#endif /* BL32_BASE */
#endif /* SECONDARY_BRINGUP */
{0}
};
setup_page_tables(bl_regions, plat_arm_get_mmap());
enable_mmu_el3(0U);
NOTICE("Done enabling MMU\n");
}