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Merge changes from topic "css_refactor_arm" into integration

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* changes:
  refactor(console): consolidate console runtime switch
  refactor(synquacer): console runtime switch on bl31 exit
  refactor(nxp): console runtime switch on bl31 exit
  refactor(nvidia): console runtime switch on bl31 exit
  refactor(hisilicon): console runtime switch on bl31 exit
  refactor(xilinx): console runtime switch on bl31 exit
  refactor(mediatek): console runtime switch on bl31 exit
  refactor(armada): console runtime switch on bl31 exit
  refactor(imx): console runtime switch on bl31 exit
  refactor(brcm): console runtime switch on bl31 exit
This commit is contained in:
Manish Pandey 2024-05-08 22:25:08 +02:00 • committed by TrustedFirmware Code Review
commit 72ac981044
17 changed files with 17 additions and 56 deletions
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7
bl31/bl31_main.c
View file

@ -212,8 +212,6 @@ void bl31_main(void)
*/
bl31_prepare_next_image_entry();
console_flush();
/*
* Perform any platform specific runtime setup prior to cold boot exit
* from BL31
@ -221,9 +219,12 @@ void bl31_main(void)
bl31_plat_runtime_setup();
#if ENABLE_RUNTIME_INSTRUMENTATION
PMF_CAPTURE_TIMESTAMP(bl_svc, BL31_EXIT, PMF_CACHE_MAINT);
console_flush();
PMF_CAPTURE_TIMESTAMP(bl_svc, BL31_EXIT, PMF_CACHE_MAINT);
#endif
console_flush();
console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*******************************************************************************

3
plat/allwinner/common/sunxi_bl31_setup.c
View file

@ -186,9 +186,6 @@ void bl31_plat_runtime_setup(void)
{
/* Change the DTB if the configuration requires so. */
sunxi_prepare_dtb(fdt);
console_flush();
console_switch_state(CONSOLE_FLAG_RUNTIME);
}
entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)

4
plat/brcm/common/brcm_bl31_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -235,8 +235,6 @@ void brcm_bl31_platform_setup(void)
******************************************************************************/
void brcm_bl31_plat_runtime_setup(void)
{
console_switch_state(CONSOLE_FLAG_RUNTIME);
/* Initialize the runtime console */
bcm_console_runtime_init();
}

2
plat/common/aarch64/plat_common.c
View file

@ -35,8 +35,6 @@
void bl31_plat_runtime_setup(void)
{
console_flush();
console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*

6
plat/hisilicon/hikey/hikey_bl31_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -149,7 +149,3 @@ void bl31_platform_setup(void)
hisi_ipc_init();
hisi_pwrc_setup();
}
void bl31_plat_runtime_setup(void)
{
}

2
plat/hisilicon/hikey960/hikey960_bl31_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/

7
plat/hisilicon/poplar/bl31_plat_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -118,11 +118,6 @@ void bl31_platform_setup(void)
hisi_tzpc_sec_init();
}
void bl31_plat_runtime_setup(void)
{
/* do nothing */
}
void bl31_plat_arch_setup(void)
{
plat_configure_mmu_el3(BL31_BASE,

7
plat/imx/imx8qm/imx8qm_bl31_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -408,8 +408,3 @@ unsigned int plat_get_syscnt_freq2(void)
{
return COUNTER_FREQUENCY;
}
void bl31_plat_runtime_setup(void)
{
return;
}

7
plat/imx/imx8qx/imx8qx_bl31_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -386,8 +386,3 @@ unsigned int plat_get_syscnt_freq2(void)
{
return COUNTER_FREQUENCY;
}
void bl31_plat_runtime_setup(void)
{
return;
}

5
plat/imx/imx93/imx93_bl31_setup.c
View file

@ -136,11 +136,6 @@ void bl31_platform_setup(void)
plat_gic_init();
}
void bl31_plat_runtime_setup(void)
{
console_switch_state(CONSOLE_FLAG_RUNTIME);
}
entry_point_info_t *bl31_plat_get_next_image_ep_info(unsigned int type)
{
if (type == NON_SECURE) {

4
plat/marvell/armada/common/marvell_bl31_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (C) 2018 Marvell International Ltd.
* Copyright (C) 2018-2024 Marvell International Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
* https://spdx.org/licenses
@ -181,8 +181,6 @@ void marvell_bl31_platform_setup(void)
*/
void marvell_bl31_plat_runtime_setup(void)
{
console_switch_state(CONSOLE_FLAG_RUNTIME);
/* Initialize the runtime console */
marvell_console_runtime_init();
}

3
plat/mediatek/common/mtk_bl31_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, MediaTek Inc. All rights reserved.
* Copyright (c) 2022-2024, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -166,7 +166,6 @@ void bl31_platform_setup(void)
void bl31_plat_runtime_setup(void)
{
mtk_init_one_level(MTK_INIT_LVL_PLAT_RUNTIME);
console_switch_state(CONSOLE_FLAG_RUNTIME);
}
unsigned int plat_get_syscnt_freq2(void)

2
plat/nvidia/tegra/common/tegra_bl31_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020-2023, NVIDIA Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
plat/socionext/synquacer/sq_bl31_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/

4
plat/xilinx/versal/bl31_versal_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
*
@ -206,8 +206,6 @@ void bl31_plat_runtime_setup(void)
if (rc != 0) {
panic();
}
console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*

4
plat/xilinx/versal_net/bl31_versal_net_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2020, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
*
@ -231,8 +231,6 @@ void bl31_plat_runtime_setup(void)
if (rc != 0) {
panic();
}
console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*

4
plat/xilinx/zynqmp/bl31_zynqmp_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -190,8 +190,6 @@ void bl31_plat_runtime_setup(void)
#endif
custom_runtime_setup();
console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*