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feat(stm32mp1-fdts): remove RTC clock configuration

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RTC clock configuration is done now in OPTEE.
Note: The RTC clock source can only be configured once.
TF-A, configuring the RTC clock source will have no effect in OPTEE.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: I111ba96b27d0de0c45086ba8ef947dd2e6785672
This commit is contained in:
Gabriel Fernandez 2023-11-23 09:56:33 +01:00 • committed by Yann Gautier
parent 1be399b813
commit 703a581e25
3 changed files with 0 additions and 6 deletions

2
fdts/stm32mp135f-dk.dts
View file

@ -190,7 +190,6 @@
CLK_AXI_PLL2P
CLK_MLAHBS_PLL3
CLK_CKPER_HSE
CLK_RTC_LSE
CLK_SDMMC1_PLL4P
CLK_SDMMC2_PLL4P
CLK_STGEN_HSE
@ -212,7 +211,6 @@
DIV(DIV_APB4, 1)
DIV(DIV_APB5, 2)
DIV(DIV_APB6, 1)
DIV(DIV_RTC, 0)
>;
st,pll_vco {

2
fdts/stm32mp157c-ed1.dts
View file

@ -194,7 +194,6 @@
CLK_MPU_PLL1P
CLK_AXI_PLL2P
CLK_MCU_PLL3P
CLK_RTC_LSE
CLK_MCO1_DISABLED
CLK_MCO2_DISABLED
CLK_CKPER_HSE
@ -243,7 +242,6 @@
DIV(DIV_APB3, 1)
DIV(DIV_APB4, 1)
DIV(DIV_APB5, 2)
DIV(DIV_RTC, 23)
DIV(DIV_MCO1, 0)
DIV(DIV_MCO2, 0)
>;

2
fdts/stm32mp15xx-dkx.dtsi
View file

@ -198,7 +198,6 @@
CLK_MPU_PLL1P
CLK_AXI_PLL2P
CLK_MCU_PLL3P
CLK_RTC_LSE
CLK_MCO1_DISABLED
CLK_MCO2_DISABLED
CLK_CKPER_HSE
@ -247,7 +246,6 @@
DIV(DIV_APB3, 1)
DIV(DIV_APB4, 1)
DIV(DIV_APB5, 2)
DIV(DIV_RTC, 23)
DIV(DIV_MCO1, 0)
DIV(DIV_MCO2, 0)
>;