Makefile: remove extra include paths in INCLUDES

Now it is needed to use the full path of the common header files. Commit 09d40e0e08 ("Sanitise includes across codebase") provides more information. Change-Id: Ifedc79d9f664d208ba565f5736612a3edd94c647 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2025-04-17 01:54:22 +00:00 · 2019-03-28 09:01:18 +00:00 · 2019-03-28 09:01:18 +00:00 · 6e756f6d6d
commit 6e756f6d6d
parent c6cafcd770
22 changed files with 36 additions and 58 deletions
--- a/22
+++ b/22
@ -285,28 +285,6 @@ INCLUDES		+=	-Iinclude				\
 				${PLAT_INCLUDES}			\
 				${SPD_INCLUDES}

-ifeq (${ERROR_DEPRECATED},0)
-INCLUDES		+=	-Iinclude/bl1				\
-				-Iinclude/bl2				\
-				-Iinclude/bl2u				\
-				-Iinclude/bl31				\
-				-Iinclude/drivers			\
-				-Iinclude/drivers/arm			\
-				-Iinclude/drivers/auth			\
-				-Iinclude/drivers/io			\
-				-Iinclude/drivers/ti/uart		\
-				-Iinclude/lib				\
-				-Iinclude/lib/cpus			\
-				-Iinclude/lib/el3_runtime		\
-				-Iinclude/lib/extensions		\
-				-Iinclude/lib/pmf			\
-				-Iinclude/lib/psci			\
-				-Iinclude/lib/xlat_tables		\
-				-Iinclude/plat/common			\
-				-Iinclude/services			\
-				-Iinclude/tools_share
-endif
-
 include common/backtrace/backtrace.mk

 ################################################################################
--- a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_d3.c
+++ b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_d3.c
@ -5,7 +5,7 @@
 */

 #include <stdint.h>
-#include <mmio.h>
+#include <lib/mmio.h>
 #include <common/debug.h>

 #include "boot_init_dram_regdef_d3.h"
@ -193,7 +193,7 @@ static void init_ddr_d3_1866(void)
         RegVal_R2 = (ReadReg_32(DBSC_D3_DBPDRGD0) & 0xFFFFFF00);
         WriteReg_32(DBSC_D3_DBPDRGA0,0x000000B0 + i*0x20);
         WriteReg_32(DBSC_D3_DBPDRGD0,RegVal_R2 | RegVal_R6);
-      } else 
+      } else
      {
         WriteReg_32(DBSC_D3_DBPDRGA0,0x000000B2 + i*0x20);
         RegVal_R2 = (ReadReg_32(DBSC_D3_DBPDRGD0) & 0xFFFFFFF8);
@ -508,7 +508,7 @@ static void init_ddr_d3_1600(void)
         RegVal_R2 = (ReadReg_32(DBSC_D3_DBPDRGD0) & 0xFFFFFF00);
         WriteReg_32(DBSC_D3_DBPDRGA0,0x000000B0 + i*0x20);
         WriteReg_32(DBSC_D3_DBPDRGD0,RegVal_R2 | RegVal_R6);
-      } else 
+      } else
      {
         WriteReg_32(DBSC_D3_DBPDRGA0,0x000000B2 + i*0x20);
         RegVal_R2 = (ReadReg_32(DBSC_D3_DBPDRGD0) & 0xFFFFFFF8);
--- a/drivers/staging/renesas/rcar/pfc/D3/pfc_init_d3.c
+++ b/drivers/staging/renesas/rcar/pfc/D3/pfc_init_d3.c
@ -5,7 +5,7 @@
 */

 #include <stdint.h>
-#include <mmio.h>
+#include <lib/mmio.h>
 #include "pfc_init_d3.h"
 #include "rcar_def.h"

@ -896,7 +896,7 @@ void pfc_init_d3(void)
 	pfc_reg_write(PFC_PUD3, 0xFF0FFFFFU);
 	pfc_reg_write(PFC_PUD4, 0xE0000000U);
 	pfc_reg_write(PFC_PUD5, 0x60000000U);
-                            
+
 	/* initialize LSI pin pull-enable register */
 	pfc_reg_write(PFC_PUEN0, 0x00000000U);
 	pfc_reg_write(PFC_PUEN1, 0x00000000U);
@ -904,7 +904,7 @@ void pfc_init_d3(void)
 	pfc_reg_write(PFC_PUEN3, 0x000F008CU);
 	pfc_reg_write(PFC_PUEN4, 0x00000000U);
 	pfc_reg_write(PFC_PUEN5, 0x00000000U);
-                             
+
 	/* initialize positive/negative logic select */
 	mmio_write_32(GPIO_POSNEG0, 0x00000000U);
 	mmio_write_32(GPIO_POSNEG1, 0x00000000U);
--- a/drivers/staging/renesas/rcar/pfc/V3M/pfc_init_v3m.c
+++ b/drivers/staging/renesas/rcar/pfc/V3M/pfc_init_v3m.c
@ -6,7 +6,7 @@
 */

 #include <stdint.h>		/* for uint32_t */
-#include <mmio.h>
+#include <lib/mmio.h>
 #include "pfc_init_v3m.h"
 #include "include/rcar_def.h"
 #include "rcar_private.h"
--- a/plat/imx/common/imx_sip_handler.c
+++ b/plat/imx/common/imx_sip_handler.c
@ -6,7 +6,7 @@

 #include <stdlib.h>
 #include <stdint.h>
-#include <std_svc.h>
+#include <services/std_svc.h>
 #include <string.h>
 #include <platform_def.h>
 #include <common/debug.h>
--- a/plat/nvidia/tegra/common/drivers/bpmp/bpmp.c
+++ b/plat/nvidia/tegra/common/drivers/bpmp/bpmp.c
@ -8,10 +8,10 @@
 #include <assert.h>
 #include <bpmp.h>
 #include <common/debug.h>
-#include <delay_timer.h>
+#include <drivers/delay_timer.h>
 #include <errno.h>
-#include <mmio.h>
-#include <platform.h>
+#include <lib/mmio.h>
+#include <plat/common/platform.h>
 #include <stdbool.h>
 #include <string.h>
 #include <tegra_def.h>
--- a/plat/nvidia/tegra/common/drivers/bpmp_ipc/intf.c
+++ b/plat/nvidia/tegra/common/drivers/bpmp_ipc/intf.c
@ -7,13 +7,13 @@
 #include <assert.h>
 #include <bpmp_ipc.h>
 #include <debug.h>
-#include <delay_timer.h>
+#include <drivers/delay_timer.h>
 #include <errno.h>
-#include <mmio.h>
+#include <lib/mmio.h>
+#include <lib/utils_def.h>
 #include <stdbool.h>
 #include <string.h>
 #include <tegra_def.h>
-#include <utils_def.h>

 #include "intf.h"
 #include "ivc.h"
--- a/plat/nvidia/tegra/common/drivers/bpmp_ipc/ivc.h
+++ b/plat/nvidia/tegra/common/drivers/bpmp_ipc/ivc.h
@ -7,9 +7,9 @@
 #ifndef IVC_H
 #define IVC_H

+#include <lib/utils_def.h>
 #include <stdint.h>
 #include <stddef.h>
-#include <utils_def.h>

 #define IVC_ALIGN		U(64)
 #define IVC_CHHDR_TX_FIELDS	U(16)
--- a/plat/nvidia/tegra/common/drivers/flowctrl/flowctrl.c
+++ b/plat/nvidia/tegra/common/drivers/flowctrl/flowctrl.c
@ -13,9 +13,9 @@
 #include <lib/mmio.h>

 #include <flowctrl.h>
+#include <lib/utils_def.h>
 #include <pmc.h>
 #include <tegra_def.h>
-#include <utils_def.h>

 #define CLK_RST_DEV_L_SET		0x300
 #define CLK_RST_DEV_L_CLR		0x304
--- a/plat/nvidia/tegra/common/drivers/gpcdma/gpcdma.c
+++ b/plat/nvidia/tegra/common/drivers/gpcdma/gpcdma.c
@ -6,14 +6,14 @@

 #include <arch_helpers.h>
 #include <common/debug.h>
-#include <delay_timer.h>
+#include <drivers/delay_timer.h>
 #include <errno.h>
 #include <gpcdma.h>
-#include <mmio.h>
+#include <lib/mmio.h>
+#include <lib/utils_def.h>
 #include <platform_def.h>
 #include <stdbool.h>
 #include <tegra_def.h>
-#include <utils_def.h>

 /* DMA channel registers */
 #define DMA_CH_CSR				U(0x0)
--- a/plat/nvidia/tegra/common/lib/debug/profiler.c
+++ b/plat/nvidia/tegra/common/lib/debug/profiler.c
@ -23,12 +23,12 @@
 #include <arch.h>
 #include <arch_helpers.h>
 #include <assert.h>
-#include <mmio.h>
+#include <lib/mmio.h>
+#include <lib/utils_def.h>
+#include <lib/xlat_tables/xlat_tables_v2.h>
 #include <profiler.h>
 #include <stdbool.h>
 #include <string.h>
-#include <utils_def.h>
-#include <xlat_tables_v2.h>

 static uint64_t shmem_base_addr;

--- a/plat/nvidia/tegra/common/tegra_topology.c
+++ b/plat/nvidia/tegra/common/tegra_topology.c
@ -7,8 +7,8 @@
 #include <platform_def.h>

 #include <arch.h>
-#include <platform.h>
 #include <lib/psci/psci.h>
+#include <plat/common/platform.h>

 #pragma weak plat_core_pos_by_mpidr

--- a/plat/nvidia/tegra/include/drivers/bpmp_ipc.h
+++ b/plat/nvidia/tegra/include/drivers/bpmp_ipc.h
@ -7,9 +7,9 @@
 #ifndef __BPMP_IPC_H__
 #define __BPMP_IPC_H__

+#include <lib/utils_def.h>
 #include <stdbool.h>
 #include <stdint.h>
-#include <utils_def.h>

 /**
 * Currently supported reset identifiers
--- a/plat/nvidia/tegra/include/drivers/memctrl_v2.h
+++ b/plat/nvidia/tegra/include/drivers/memctrl_v2.h
@ -11,7 +11,7 @@

 #ifndef __ASSEMBLY__

-#include <mmio.h>
+#include <lib/mmio.h>
 #include <stdint.h>

 /*******************************************************************************
--- a/plat/nvidia/tegra/include/plat_macros.S
+++ b/plat/nvidia/tegra/include/plat_macros.S
@ -7,7 +7,7 @@
 #ifndef PLAT_MACROS_S
 #define PLAT_MACROS_S

-#include <gicv2.h>
+#include <drivers/arm/gicv2.h>
 #include <tegra_def.h>

 .section .rodata.gic_reg_name, "aS"
--- a/plat/nvidia/tegra/include/tegra_platform.h
+++ b/plat/nvidia/tegra/include/tegra_platform.h
@ -8,8 +8,8 @@
 #define TEGRA_PLATFORM_H

 #include <cdefs.h>
+#include <lib/utils_def.h>
 #include <stdbool.h>
-#include <utils_def.h>

 /*******************************************************************************
 * Tegra major, minor version helper macros
--- a/plat/nvidia/tegra/soc/t132/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t132/plat_setup.c
@ -7,7 +7,7 @@
 #include <arch_helpers.h>
 #include <common/bl_common.h>
 #include <lib/xlat_tables/xlat_tables_v2.h>
-#include <platform.h>
+#include <plat/common/platform.h>
 #include <tegra_def.h>
 #include <tegra_private.h>

--- a/plat/nvidia/tegra/soc/t210/drivers/se/security_engine.c
+++ b/plat/nvidia/tegra/soc/t210/drivers/se/security_engine.c
@ -8,10 +8,10 @@
 #include <arch_helpers.h>
 #include <assert.h>
 #include <common/debug.h>
-#include <delay_timer.h>
+#include <drivers/delay_timer.h>
 #include <errno.h>
-#include <mmio.h>
-#include <psci.h>
+#include <lib/mmio.h>
+#include <lib/psci/psci.h>
 #include <se_private.h>
 #include <security_engine.h>
 #include <tegra_platform.h>
--- a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
+++ b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
@ -15,6 +15,7 @@

 #include <bpmp.h>
 #include <flowctrl.h>
+#include <lib/utils.h>
 #include <memctrl.h>
 #include <pmc.h>
 #include <platform_def.h>
@ -22,7 +23,6 @@
 #include <tegra_def.h>
 #include <tegra_private.h>
 #include <tegra_platform.h>
-#include <utils.h>

 /*
 * Register used to clear CPU reset signals. Each CPU has two reset
--- a/plat/nvidia/tegra/soc/t210/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t210/plat_setup.c
@ -19,7 +19,7 @@
 #include <bpmp.h>
 #include <flowctrl.h>
 #include <memctrl.h>
-#include <platform.h>
+#include <plat/common/platform.h>
 #include <security_engine.h>
 #include <tegra_def.h>
 #include <tegra_platform.h>
--- a/plat/nvidia/tegra/soc/t210/plat_sip_calls.c
+++ b/plat/nvidia/tegra/soc/t210/plat_sip_calls.c
@ -11,8 +11,8 @@
 #include <common/debug.h>
 #include <common/runtime_svc.h>
 #include <errno.h>
-#include <mmio.h>
-#include <utils_def.h>
+#include <lib/mmio.h>
+#include <lib/utils_def.h>

 #include <memctrl.h>
 #include <pmc.h>
--- a/services/spd/trusty/trusty.c
+++ b/services/spd/trusty/trusty.c
@ -5,9 +5,9 @@
 */

 #include <assert.h>
+#include <lib/xlat_tables/xlat_tables_v2.h>
 #include <stdbool.h>
 #include <string.h>
-#include <xlat_tables_v2.h>

 #include <arch_helpers.h>
 #include <bl31/bl31.h>