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feat(xilinx): add none console

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None console does not register boot and runtime console.
User will not observe any console logs.

Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
This commit is contained in:
Michal Simek 2024-09-10 15:55:04 +02:00 • committed by Maheedhar Bollapalli
parent 11964742d6
commit 6d41398382
9 changed files with 25 additions and 10 deletions
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3
plat/amd/versal2/include/def.h
View file

@ -15,6 +15,7 @@
#define MAX_INTR_EL3 2 #define MAX_INTR_EL3 2
/* List all consoles */ /* List all consoles */
#define VERSAL2_CONSOLE_ID_none 0
#define VERSAL2_CONSOLE_ID_pl011 1 #define VERSAL2_CONSOLE_ID_pl011 1
#define VERSAL2_CONSOLE_ID_pl011_0 1 #define VERSAL2_CONSOLE_ID_pl011_0 1
#define VERSAL2_CONSOLE_ID_pl011_1 2 #define VERSAL2_CONSOLE_ID_pl011_1 2
@ -162,6 +163,8 @@
#elif CONSOLE_IS(dcc) #elif CONSOLE_IS(dcc)
# define UART_BASE 0x0 # define UART_BASE 0x0
# define UART_TYPE CONSOLE_DCC # define UART_TYPE CONSOLE_DCC
#elif CONSOLE_IS(none)
# define UART_TYPE CONSOLE_NONE
#else #else
# error "invalid VERSAL2_CONSOLE" # error "invalid VERSAL2_CONSOLE"
#endif #endif

2
plat/amd/versal2/platform.mk
View file

@ -58,7 +58,7 @@ USE_COHERENT_MEM := 0
HW_ASSISTED_COHERENCY := 1 HW_ASSISTED_COHERENCY := 1
VERSAL2_CONSOLE ?= pl011 VERSAL2_CONSOLE ?= pl011
ifeq (${VERSAL2_CONSOLE}, $(filter ${VERSAL2_CONSOLE},pl011 pl011_0 pl011_1 dcc dtb)) ifeq (${VERSAL2_CONSOLE}, $(filter ${VERSAL2_CONSOLE},pl011 pl011_0 pl011_1 dcc dtb none))
else else
$(error "Please define VERSAL2_CONSOLE") $(error "Please define VERSAL2_CONSOLE")
endif endif

15
plat/xilinx/common/plat_console.c
View file

@ -23,6 +23,7 @@
#include <platform_def.h> #include <platform_def.h>
#include <plat_private.h> #include <plat_private.h>
#if !(CONSOLE_IS(none))
static console_t boot_console; static console_t boot_console;
static console_holder boot_hd_console; static console_holder boot_hd_console;
#if defined(CONSOLE_RUNTIME) #if defined(CONSOLE_RUNTIME)
@ -282,12 +283,9 @@ void setup_console(void)
#if (RT_CONSOLE_IS(dtb) && defined(XILINX_OF_BOARD_DTB_ADDR)) && \ #if (RT_CONSOLE_IS(dtb) && defined(XILINX_OF_BOARD_DTB_ADDR)) && \
(!defined(PLAT_zynqmp) || (defined(PLAT_zynqmp) && \ (!defined(PLAT_zynqmp) || (defined(PLAT_zynqmp) && \
!IS_TFA_IN_OCM(BL31_BASE))) !IS_TFA_IN_OCM(BL31_BASE)))
/* DT based runtime console */ rt_hd_console.base = dt_uart_info.base;
if (dt_uart_info.console_type != CONSOLE_NONE) { rt_hd_console.baud_rate = dt_uart_info.baud_rate;
rt_hd_console.base = dt_uart_info.base; rt_hd_console.console_type = dt_uart_info.console_type;
rt_hd_console.baud_rate = dt_uart_info.baud_rate;
rt_hd_console.console_type = dt_uart_info.console_type;
}
#else #else
rt_hd_console.base = (uintptr_t)RT_UART_BASE; rt_hd_console.base = (uintptr_t)RT_UART_BASE;
rt_hd_console.baud_rate = (uint32_t)UART_BAUDRATE; rt_hd_console.baud_rate = (uint32_t)UART_BAUDRATE;
@ -308,3 +306,8 @@ void setup_console(void)
} }
#endif #endif
} }
#else
void setup_console(void)
{
}
#endif

3
plat/xilinx/versal/include/versal_def.h
View file

@ -18,6 +18,7 @@
/* number of interrupt handlers. increase as required */ /* number of interrupt handlers. increase as required */
#define MAX_INTR_EL3 2 #define MAX_INTR_EL3 2
/* List all consoles */ /* List all consoles */
#define VERSAL_CONSOLE_ID_none 0
#define VERSAL_CONSOLE_ID_pl011 1 #define VERSAL_CONSOLE_ID_pl011 1
#define VERSAL_CONSOLE_ID_pl011_0 1 #define VERSAL_CONSOLE_ID_pl011_0 1
#define VERSAL_CONSOLE_ID_pl011_1 2 #define VERSAL_CONSOLE_ID_pl011_1 2
@ -82,6 +83,8 @@
#elif CONSOLE_IS(dcc) #elif CONSOLE_IS(dcc)
# define UART_BASE 0x0 # define UART_BASE 0x0
# define UART_TYPE CONSOLE_DCC # define UART_TYPE CONSOLE_DCC
#elif CONSOLE_IS(none)
# define UART_TYPE CONSOLE_NONE
#else #else
# error "invalid VERSAL_CONSOLE" # error "invalid VERSAL_CONSOLE"
#endif #endif

2
plat/xilinx/versal/platform.mk
View file

@ -85,7 +85,7 @@ PLAT_BL_COMMON_SOURCES := drivers/arm/dcc/dcc_console.c \
${XLAT_TABLES_LIB_SRCS} ${XLAT_TABLES_LIB_SRCS}
VERSAL_CONSOLE ?= pl011 VERSAL_CONSOLE ?= pl011
ifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc dtb)) ifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc dtb none))
else else
$(error "Please define VERSAL_CONSOLE") $(error "Please define VERSAL_CONSOLE")
endif endif

3
plat/xilinx/versal_net/include/versal_net_def.h
View file

@ -15,6 +15,7 @@
#define MAX_INTR_EL3 2 #define MAX_INTR_EL3 2
/* List all consoles */ /* List all consoles */
#define VERSAL_NET_CONSOLE_ID_none U(0)
#define VERSAL_NET_CONSOLE_ID_pl011 U(1) #define VERSAL_NET_CONSOLE_ID_pl011 U(1)
#define VERSAL_NET_CONSOLE_ID_pl011_0 U(1) #define VERSAL_NET_CONSOLE_ID_pl011_0 U(1)
#define VERSAL_NET_CONSOLE_ID_pl011_1 U(2) #define VERSAL_NET_CONSOLE_ID_pl011_1 U(2)
@ -157,6 +158,8 @@
#elif CONSOLE_IS(dcc) #elif CONSOLE_IS(dcc)
# define UART_BASE 0x0 # define UART_BASE 0x0
# define UART_TYPE CONSOLE_DCC # define UART_TYPE CONSOLE_DCC
#elif CONSOLE_IS(none)
# define UART_TYPE CONSOLE_NONE
#else #else
# error "invalid VERSAL_NET_CONSOLE" # error "invalid VERSAL_NET_CONSOLE"
#endif #endif

2
plat/xilinx/versal_net/platform.mk
View file

@ -60,7 +60,7 @@ USE_COHERENT_MEM := 0
HW_ASSISTED_COHERENCY := 1 HW_ASSISTED_COHERENCY := 1
VERSAL_NET_CONSOLE ?= pl011 VERSAL_NET_CONSOLE ?= pl011
ifeq (${VERSAL_NET_CONSOLE}, $(filter ${VERSAL_NET_CONSOLE},pl011 pl011_0 pl011_1 dcc dtb)) ifeq (${VERSAL_NET_CONSOLE}, $(filter ${VERSAL_NET_CONSOLE},pl011 pl011_0 pl011_1 dcc dtb none))
else else
$(error Please define VERSAL_NET_CONSOLE) $(error Please define VERSAL_NET_CONSOLE)
endif endif

3
plat/xilinx/zynqmp/include/zynqmp_def.h
View file

@ -10,6 +10,7 @@
#include <plat/arm/common/smccc_def.h> #include <plat/arm/common/smccc_def.h>
#include <plat/common/common_def.h> #include <plat/common/common_def.h>
#define ZYNQMP_CONSOLE_ID_none 0
#define ZYNQMP_CONSOLE_ID_cadence 1 #define ZYNQMP_CONSOLE_ID_cadence 1
#define ZYNQMP_CONSOLE_ID_cadence0 1 #define ZYNQMP_CONSOLE_ID_cadence0 1
#define ZYNQMP_CONSOLE_ID_cadence1 2 #define ZYNQMP_CONSOLE_ID_cadence1 2
@ -164,6 +165,8 @@
#elif CONSOLE_IS(dcc) #elif CONSOLE_IS(dcc)
# define UART_BASE 0x0 # define UART_BASE 0x0
# define UART_TYPE CONSOLE_DCC # define UART_TYPE CONSOLE_DCC
#elif CONSOLE_IS(none)
# define UART_TYPE CONSOLE_NONE
#else #else
# error "invalid ZYNQMP_CONSOLE" # error "invalid ZYNQMP_CONSOLE"
#endif #endif

2
plat/xilinx/zynqmp/platform.mk
View file

@ -111,7 +111,7 @@ PLAT_BL_COMMON_SOURCES := drivers/arm/dcc/dcc_console.c \
${XLAT_TABLES_LIB_SRCS} ${XLAT_TABLES_LIB_SRCS}
ZYNQMP_CONSOLE ?= cadence ZYNQMP_CONSOLE ?= cadence
ifeq (${ZYNQMP_CONSOLE}, $(filter ${ZYNQMP_CONSOLE},cadence cadence0 cadence1 dcc dtb)) ifeq (${ZYNQMP_CONSOLE}, $(filter ${ZYNQMP_CONSOLE},cadence cadence0 cadence1 dcc dtb none))
else else
$(error "Please define ZYNQMP_CONSOLE") $(error "Please define ZYNQMP_CONSOLE")
endif endif