From 6cb8be17a53f4e11880ba13b78fca15895281cfe Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Tue, 17 Oct 2023 05:56:01 -0500 Subject: [PATCH] fix(cpus): workaround for Neoverse N2 erratum 2346952 Neoverse N2 erratum 2346952 is a Cat B erratum that applies to all revisions <= r0p2 and is fixed in r0p3. The workaround is to set L2 TQ size statically to it's full size. SDEN documentation: https://developer.arm.com/documentation/SDEN-1982442/latest Change-Id: I03c3cf1f951fbc906fdebcb99a523c5ac8ba055d Signed-off-by: Bipin Ravi --- docs/design/cpu-specific-build-macros.rst | 4 ++++ include/lib/cpus/aarch64/neoverse_n2.h | 5 ++++- lib/cpus/aarch64/neoverse_n2.S | 10 ++++++++++ lib/cpus/cpu-ops.mk | 4 ++++ services/std_svc/errata_abi/errata_abi_main.c | 15 ++++++++------- 5 files changed, 30 insertions(+), 8 deletions(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 146026b4a..0b0184076 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -655,6 +655,10 @@ For Neoverse N2, the following errata build flags are defined : CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in r0p1. +- ``ERRATA_N2_2346952``: This applies errata 2346952 workaround to Neoverse-N2 + CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU, + it is fixed in r0p3. + - ``ERRATA_N2_2376738``: This applies errata 2376738 workaround to Neoverse-N2 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open. diff --git a/include/lib/cpus/aarch64/neoverse_n2.h b/include/lib/cpus/aarch64/neoverse_n2.h index 0d5085433..b379faba6 100644 --- a/include/lib/cpus/aarch64/neoverse_n2.h +++ b/include/lib/cpus/aarch64/neoverse_n2.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, Arm Limited. All rights reserved. + * Copyright (c) 2020-2023, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -65,5 +65,8 @@ #define NEOVERSE_N2_CPUECTLR2_EL1_PF_MODE_CNSRV ULL(9) #define CPUECTLR2_EL1_PF_MODE_LSB U(11) #define CPUECTLR2_EL1_PF_MODE_WIDTH U(4) +#define CPUECTLR2_EL1_TXREQ_STATIC_FULL ULL(0) +#define CPUECTLR2_EL1_TXREQ_LSB U(0) +#define CPUECTLR2_EL1_TXREQ_WIDTH U(3) #endif /* NEOVERSE_N2_H */ diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index ead390800..f80115177 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -165,6 +165,16 @@ workaround_runtime_end neoverse_n2, ERRATUM(2326639) check_erratum_ls neoverse_n2, ERRATUM(2326639), CPU_REV(0, 0) +workaround_runtime_start neoverse_n2, ERRATUM(2346952), ERRATA_N2_2346952 + /* Set TXREQ to STATIC and full L2 TQ size */ + mrs x1, NEOVERSE_N2_CPUECTLR2_EL1 + mov x0, #CPUECTLR2_EL1_TXREQ_STATIC_FULL + bfi x1, x0, #CPUECTLR2_EL1_TXREQ_LSB, #CPUECTLR2_EL1_TXREQ_WIDTH + msr NEOVERSE_N2_CPUECTLR2_EL1, x1 +workaround_runtime_end neoverse_n2, ERRATUM(2346952) + +check_erratum_ls neoverse_n2, ERRATUM(2346952), CPU_REV(0, 2) + workaround_reset_start neoverse_n2, ERRATUM(2376738), ERRATA_N2_2376738 /* Set CPUACTLR2_EL1[0] to 1 to force PLDW/PFRM * ST to behave like PLD/PFRM LD and not cause diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index ea2904724..92c6aa491 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -660,6 +660,10 @@ CPU_FLAG_LIST += ERRATA_N2_2280757 # applies to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2326639 +# Flag to apply erratum 2346952 workaround during reset. This erratum applies +# to r0p0, r0p1, r0p2 of the Neoverse N2 cpu, it is fixed in r0p3. +CPU_FLAG_LIST += ERRATA_N2_2346952 + # Flag to apply erratum 2376738 workaround during reset. This erratum applies # to revision r0p0, r0p1, r0p2, r0p3 of the Neoverse N2 cpu and is still open. CPU_FLAG_LIST += ERRATA_N2_2376738 diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c index 38ba638d0..06c38721f 100644 --- a/services/std_svc/errata_abi/errata_abi_main.c +++ b/services/std_svc/errata_abi/errata_abi_main.c @@ -350,14 +350,15 @@ struct em_cpu_list cpu_list[] = { [9] = {2242415, 0x00, 0x00, ERRATA_N2_2242415}, [10] = {2280757, 0x00, 0x00, ERRATA_N2_2280757}, [11] = {2326639, 0x00, 0x00, ERRATA_N2_2326639}, - [12] = {2376738, 0x00, 0x03, ERRATA_N2_2376738}, - [13] = {2388450, 0x00, 0x00, ERRATA_N2_2388450}, - [14] = {2728475, 0x00, 0x02, ERRATA_N2_2728475, \ + [12] = {2346952, 0x00, 0x02, ERRATA_N2_2346952}, + [13] = {2376738, 0x00, 0x00, ERRATA_N2_2376738}, + [14] = {2388450, 0x00, 0x00, ERRATA_N2_2388450}, + [15] = {2728475, 0x00, 0x02, ERRATA_N2_2728475, \ ERRATA_NON_ARM_INTERCONNECT}, - [15] = {2743014, 0x00, 0x02, ERRATA_N2_2743014}, - [16] = {2743089, 0x00, 0x02, ERRATA_N2_2743089}, - [17] = {2779511, 0x00, 0x02, ERRATA_N2_2779511}, - [18 ... ERRATA_LIST_END] = UNDEF_ERRATA, + [16] = {2743014, 0x00, 0x02, ERRATA_N2_2743014}, + [17] = {2743089, 0x00, 0x02, ERRATA_N2_2743089}, + [18] = {2779511, 0x00, 0x02, ERRATA_N2_2779511}, + [19 ... ERRATA_LIST_END] = UNDEF_ERRATA, } }, #endif /* NEOVERSE_N2_H_INC */