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synquacer: Enable optional OP-TEE support
OP-TEE loading is optional on Developerbox controlled via SCP firmware. To check if OP-TEE is loaded or not, we use DRAM1 region info passed by SCP firmware. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
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parent
ba0248b52d
commit
6cb2a39703
2 changed files with 28 additions and 11 deletions
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@ -18,6 +18,10 @@ ERRATA_A53_855873 := 1
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# Libraries
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include lib/xlat_tables_v2/xlat_tables.mk
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ifeq (${SPD},opteed)
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TF_CFLAGS_aarch64 += -DBL32_BASE=0xfc000000
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endif
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PLAT_PATH := plat/socionext/synquacer
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PLAT_INCLUDES := -I$(PLAT_PATH)/include \
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-I$(PLAT_PATH)/drivers/scpi \
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@ -70,15 +70,31 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
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assert(from_bl2 == NULL);
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assert(plat_params_from_bl2 == NULL);
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/* Initialize power controller before setting up topology */
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plat_sq_pwrc_setup();
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#ifdef BL32_BASE
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/* Populate entry point information for BL32 */
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SET_PARAM_HEAD(&bl32_image_ep_info,
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PARAM_EP,
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VERSION_1,
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0);
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SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
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bl32_image_ep_info.pc = BL32_BASE;
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bl32_image_ep_info.spsr = sq_get_spsr_for_bl32_entry();
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struct draminfo di = {0};
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scpi_get_draminfo(&di);
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/*
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* Check if OP-TEE has been loaded in Secure RAM allocated
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* from DRAM1 region
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*/
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if ((di.base1 + di.size1) <= BL32_BASE) {
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NOTICE("OP-TEE has been loaded by SCP firmware\n");
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/* Populate entry point information for BL32 */
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SET_PARAM_HEAD(&bl32_image_ep_info,
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PARAM_EP,
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VERSION_1,
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0);
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SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
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bl32_image_ep_info.pc = BL32_BASE;
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bl32_image_ep_info.spsr = sq_get_spsr_for_bl32_entry();
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} else {
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NOTICE("OP-TEE has not been loaded by SCP firmware\n");
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}
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#endif /* BL32_BASE */
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/* Populate entry point information for BL33 */
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@ -125,9 +141,6 @@ void bl31_platform_setup(void)
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/* Allow access to the System counter timer module */
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sq_configure_sys_timer();
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/* Initialize power controller before setting up topology */
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plat_sq_pwrc_setup();
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}
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void bl31_plat_runtime_setup(void)
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