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feat(morello): add support for I2S audio
Add support for Morello I2S audio subsystem. This includes adding the audio formatter and I2S transmitter nodes and gluing them together with the hdmi codec using a simple sound card machine node. Change-Id: I3de4b06ef965c8e0555d074118b944fe6b4b78bb Signed-off-by: Anurag Koul <anurag.koul@arm.com> Signed-off-by: Faiz Abbas <faiz.abbas@arm.com>
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2 changed files with 57 additions and 2 deletions
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@ -194,10 +194,12 @@
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interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&dpu_aclk>;
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clocks = <&dpu_aclk>;
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hdmi-transmitter@70 {
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hdmi_tx: hdmi-transmitter@70 {
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compatible = "nxp,tda998x";
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compatible = "nxp,tda998x";
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reg = <0x70>;
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reg = <0x70>;
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video-ports = <0x234501>;
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video-ports = <0x234501>;
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#sound-dai-cells = <0>;
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audio-ports = <2 0x03>;
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port {
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port {
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tda998x_0_input: endpoint {
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tda998x_0_input: endpoint {
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remote-endpoint = <&dp_pl0_out0>;
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remote-endpoint = <&dp_pl0_out0>;
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@ -255,6 +257,52 @@
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};
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};
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};
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};
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};
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};
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iofpga_i2s: xlnx-i2s@1c150000 {
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#sound-dai-cells = <0>;
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compatible = "xlnx,i2s-transmitter-1.0";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x0 0x1c150000 0x0 0x10000>;
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xlnx,dwidth = <0x18>;
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xlnx,num-channels = <1>;
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};
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audio_formatter: audio-formatter@1c100000 {
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compatible = "xlnx,audio-formatter-1.0";
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reg = <0x0 0x1c000000 0x0 0x10000>;
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#sound-dai-cells = <0>;
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interrupt-names = "irq_mm2s";
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interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "s_axi_lite_aclk", "aud_mclk", "m_axis_mm2s_aclk";
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clocks = <&soc_refclk85mhz>, <&i2s_audclk>, <&soc_refclk85mhz>;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&audio_master>;
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simple-audio-card,frame-master = <&audio_master>;
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audio_master: simple-audio-card,cpu {
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sound-dai = <&iofpga_i2s>;
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clocks = <&i2s_audclk>;
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};
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simple-audio-card,codec {
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sound-dai = <&hdmi_tx>;
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};
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simple-audio-card,plat {
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sound-dai = <&audio_formatter>;
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};
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};
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i2s_audclk: i2s_audclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <12288000>;
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clock-output-names = "iofpga:i2s_audclk";
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};
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};
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};
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&gic {
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&gic {
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2020-2022, Arm Limited. All rights reserved.
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* Copyright (c) 2020-2023, Arm Limited. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -88,6 +88,13 @@
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clock-output-names = "apb_pclk";
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clock-output-names = "apb_pclk";
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};
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};
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soc_refclk85mhz: refclk85mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <85000000>;
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clock-output-names = "iofpga:aclk";
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};
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soc_uartclk: uartclk {
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soc_uartclk: uartclk {
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compatible = "fixed-clock";
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compatible = "fixed-clock";
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#clock-cells = <0>;
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#clock-cells = <0>;
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