Merge changes from topic "xlnx_zynqmp_console" into integration

* changes:
  fix(bl31): resolve runtime console garbage in next stage
  fix(cadence): update console flush uart driver
This commit is contained in:
Manish Pandey 2023-09-07 10:47:36 +02:00 committed by TrustedFirmware Code Review
commit 6babc4660c
3 changed files with 11 additions and 1 deletions
bl31
drivers/cadence/uart/aarch64
include/drivers/cadence

View file

@ -163,6 +163,7 @@ void bl31_main(void)
if (bl32_init != NULL) {
INFO("BL31: Initializing BL32\n");
console_flush();
int32_t rc = (*bl32_init)();
if (rc == 0) {
@ -178,6 +179,7 @@ void bl31_main(void)
if (rmm_init != NULL) {
INFO("BL31: Initializing RMM\n");
console_flush();
int32_t rc = (*rmm_init)();
if (rc == 0) {

View file

@ -197,7 +197,14 @@ func console_cdns_core_flush
cmp x0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
/* Placeholder */
/* Loop until the transmit FIFO is empty */
check_txfifo_empty:
ldr w2, [x0, #R_UART_SR]
tbz w2, #UART_SR_INTR_TEMPTY_BIT, check_txfifo_empty
/* Wait until the Transmit is Inactive */
check_tx_inactive_state:
ldr w2, [x0, #R_UART_SR]
tbnz w2, #UART_SR_INTR_TACTIVE_BIT, check_tx_inactive_state
ret
endfunc console_cdns_core_flush

View file

@ -22,6 +22,7 @@
#define UART_SR_INTR_REMPTY_BIT 1
#define UART_SR_INTR_TFUL_BIT 4
#define UART_SR_INTR_TEMPTY_BIT 3
#define UART_SR_INTR_TACTIVE_BIT 11
#define R_UART_TX 0x30
#define R_UART_RX 0x30