diff --git a/fdts/stm32mp257f-dk-ca35tdcid-fw-config.dtsi b/fdts/stm32mp257f-dk-ca35tdcid-fw-config.dtsi new file mode 100644 index 000000000..9637e1ab2 --- /dev/null +++ b/fdts/stm32mp257f-dk-ca35tdcid-fw-config.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved + */ + +/* + * STM32MP25 tf-a firmware config + * Project : open + * Generated by XLmx tool version 2.2 - 3/6/2024 11:20:07 AM + */ + +/ { + dtb-registry { + soc_fw-config { + load-address = <0x0 0x81fc0000>; + max-size = <0x40000>; + }; + tos_fw { + load-address = <0x0 0x82000000>; + max-size = <0x2000000>; + }; + }; +}; diff --git a/fdts/stm32mp257f-dk-ca35tdcid-rcc.dtsi b/fdts/stm32mp257f-dk-ca35tdcid-rcc.dtsi new file mode 100644 index 000000000..dd38a52e9 --- /dev/null +++ b/fdts/stm32mp257f-dk-ca35tdcid-rcc.dtsi @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved + * Author: Loic Pallardy loic.pallardy@foss.st.com for STMicroelectronics. + */ + +/* + * STM32MP25 Clock tree device tree configuration + * Project : open + * Generated by XLmx tool version 2.2 - 3/6/2024 11:20:07 AM + */ + +&clk_hse { + clock-frequency = <40000000>; +}; + +&clk_hsi { + clock-frequency = <64000000>; +}; + +&clk_lse { + clock-frequency = <32768>; +}; + +&clk_lsi { + clock-frequency = <32000>; +}; + +&clk_msi { + clock-frequency = <16000000>; +}; + +&rcc { + st,busclk = < + DIV_CFG(DIV_LSMCU, 1) + DIV_CFG(DIV_APB1, 0) + DIV_CFG(DIV_APB2, 0) + DIV_CFG(DIV_APB3, 0) + DIV_CFG(DIV_APB4, 0) + DIV_CFG(DIV_APBDBG, 0) + >; + + st,flexgen = < + FLEXGEN_CFG(0, XBAR_SRC_PLL4, 0, 2) + FLEXGEN_CFG(1, XBAR_SRC_PLL4, 0, 5) + FLEXGEN_CFG(2, XBAR_SRC_PLL4, 0, 1) + FLEXGEN_CFG(4, XBAR_SRC_PLL4, 0, 3) + FLEXGEN_CFG(5, XBAR_SRC_PLL4, 0, 2) + FLEXGEN_CFG(8, XBAR_SRC_HSI_KER, 0, 0) + FLEXGEN_CFG(48, XBAR_SRC_PLL5, 0, 3) + FLEXGEN_CFG(51, XBAR_SRC_PLL4, 0, 5) + FLEXGEN_CFG(52, XBAR_SRC_PLL4, 0, 5) + FLEXGEN_CFG(58, XBAR_SRC_HSE_KER, 0, 1) + FLEXGEN_CFG(63, XBAR_SRC_PLL4, 0, 2) + >; + + st,kerclk = < + MUX_CFG(MUX_USB2PHY1, MUX_USB2PHY1_FLEX57) + MUX_CFG(MUX_USB2PHY2, MUX_USB2PHY2_FLEX58) + >; + + pll1: st,pll-1 { + st,pll = <&pll1_cfg_1200Mhz>; + + pll1_cfg_1200Mhz: pll1-cfg-1200Mhz { + cfg = <30 1 1 1>; + src = ; + }; + }; + + pll2: st,pll-2 { + st,pll = <&pll2_cfg_600Mhz>; + + pll2_cfg_600Mhz: pll2-cfg-600Mhz { + cfg = <30 1 1 2>; + src = ; + }; + }; + + pll4: st,pll-4 { + st,pll = <&pll4_cfg_1200Mhz>; + + pll4_cfg_1200Mhz: pll4-cfg-1200Mhz { + cfg = <30 1 1 1>; + src = ; + }; + }; + + pll5: st,pll-5 { + st,pll = <&pll5_cfg_532Mhz>; + + pll5_cfg_532Mhz: pll5-cfg-532Mhz { + cfg = <133 5 1 2>; + src = ; + }; + }; +}; diff --git a/fdts/stm32mp257f-dk-fw-config.dts b/fdts/stm32mp257f-dk-fw-config.dts new file mode 100644 index 000000000..67f8e30cf --- /dev/null +++ b/fdts/stm32mp257f-dk-fw-config.dts @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (c) 2025, STMicroelectronics - All Rights Reserved + */ + +#include "stm32mp25-fw-config.dtsi" +#include "stm32mp257f-dk-ca35tdcid-fw-config.dtsi" diff --git a/fdts/stm32mp257f-dk.dts b/fdts/stm32mp257f-dk.dts new file mode 100644 index 000000000..ae18d6ab4 --- /dev/null +++ b/fdts/stm32mp257f-dk.dts @@ -0,0 +1,206 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved + * Author: Alexandre Torgue for STMicroelectronics. + */ + +/dts-v1/; + +#include +#include "stm32mp257.dtsi" +#include "stm32mp25xf.dtsi" +#include "stm32mp257f-dk-ca35tdcid-rcc.dtsi" +#include "stm32mp25-lpddr4-1x32Gbits-1x32bits-1200MHz.dtsi" +#include "stm32mp25-pinctrl.dtsi" +#include "stm32mp25xxal-pinctrl.dtsi" + +/ { + model = "STMicroelectronics STM32MP257F-DK Discovery Board"; + compatible = "st,stm32mp257f-dk", "st,stm32mp257"; + + aliases { + serial0 = &usart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x1 0x00000000>; + }; + + shadow-prov { + compatible = "st,provisioning"; + + hconf1_prov { + nvmem-cells = <&hconf1_otp>; + st,shadow-value = <0x00018000>; + }; + }; +}; + +&bsec { + board_id: board-id@3d8 { + reg = <0x3d8 0x4>; + }; +}; + +&ddr { + vdd1-supply = <&vdd1_ddr>; + vdd2-supply = <&vdd2_ddr>; + vddq-supply = <&vdd2_ddr>; +}; + +&i2c7 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_pins_a>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + clock-frequency = <400000>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pmic2: stpmic@33 { + compatible = "st,stpmic2"; + reg = <0x33>; + status = "okay"; + + regulators { + compatible = "st,stpmic2-regulators"; + + vddcpu: buck1 { + regulator-name = "vddcpu"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <910000>; + regulator-always-on; + }; + vddcore: buck2 { + regulator-name = "vddcore"; + regulator-min-microvolt = <820000>; + regulator-max-microvolt = <820000>; + regulator-always-on; + }; + vddgpu: buck3 { + regulator-name = "vddgpu"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <900000>; + regulator-always-on; + }; + vddio_pmic: buck4 { + regulator-name = "vddio_pmic"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + v1v8: buck5 { + regulator-name = "v1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + vdd2_ddr: buck6 { + regulator-name = "vdd2_ddr"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + v3v3: buck7 { + regulator-name = "v3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + vdda1v8_aon: ldo1 { + regulator-name = "vdda1v8_aon"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + vdd_emmc: ldo2 { + regulator-name = "vdd_emmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + vdd1_ddr: ldo3 { + regulator-name = "vdd1_ddr"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <1000>; + }; + vdd3v3_usb: ldo4 { + regulator-name = "vdd3v3_usb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + v5v_hdmi: ldo5 { + regulator-name = "v5v_hdmi"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + }; + vdd_sdcard: ldo7 { + regulator-name = "vdd_sdcard"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + vddio_sdcard: ldo8 { + regulator-name = "vddio_sdcard"; + st,regulator-bypass-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; +}; + +&pwr { + vddio1: vddio1 { + vddio1-supply = <&vddio_sdcard>; + }; + vddio2: vddio2 { + vddio2-supply = <&v1v8>; + }; + vddio3: vddio3 { + vddio3-supply = <&vddio_pmic>; + }; + vddio4: vddio4 { + vddio4-supply = <&vddio_pmic>; + }; + vddio: vddio { + vdd-supply = <&vddio_pmic>; + }; +}; + +&sdmmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc1_b4_pins_b>; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&vdd_sdcard>; + vqmmc-supply = <&vddio1>; + status = "okay"; +}; + +&sdmmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; + non-removable; + no-sd; + no-sdio; + st,neg-edge; + bus-width = <8>; + vmmc-supply = <&vdd_emmc>; + vqmmc-supply = <&vddio2>; + status = "okay"; +}; + +&usart2 { + pinctrl-names = "default"; + pinctrl-0 = <&usart2_pins_a>; + status = "okay"; +};