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Update renesas platform to not rely on undefined overflow behaviour

Browse source 
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: I51278beacbe6da79853c3f0f0f94cd806fc9652c
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
This commit is contained in:
Justin Chadwell 2019-07-03 14:11:06 +01:00
parent 1578169edd
commit 673406b508
4 changed files with 7 additions and 7 deletions
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2
drivers/renesas/rcar/cpld/ulcb_cpld.c
View file

@ -68,7 +68,7 @@ static void cpld_write(uint8_t addr, uint32_t data)
for (i = 0; i < 32; i++) {
/* MSB first */
gpio_set_value(GPIO_OUTDT6, MOSI, data & (1 << 31));
gpio_set_value(GPIO_OUTDT6, MOSI, data & (1U << 31));
gpio_set_value(GPIO_OUTDT6, SCLK, 1);
data <<= 1;
gpio_set_value(GPIO_OUTDT6, SCLK, 0);

6
drivers/renesas/rcar/pwrc/pwrc.c
View file

@ -763,10 +763,10 @@ uint32_t rcar_pwrc_get_cluster(void)
reg = mmio_read_32(RCAR_PRR);
if (reg & (1 << (STATE_CA53_CPU + RCAR_CA53CPU_NUM_MAX)))
if (reg & (1U << (STATE_CA53_CPU + RCAR_CA53CPU_NUM_MAX)))
return RCAR_CLUSTER_CA57;
if (reg & (1 << (STATE_CA57_CPU + RCAR_CA57CPU_NUM_MAX)))
if (reg & (1U << (STATE_CA57_CPU + RCAR_CA57CPU_NUM_MAX)))
return RCAR_CLUSTER_CA53;
return RCAR_CLUSTER_A53A57;
@ -810,7 +810,7 @@ uint32_t rcar_pwrc_get_cpu_num(uint32_t c)
count_ca57:
if (IS_A53A57(c) || IS_CA57(c)) {
if (reg & (1 << (STATE_CA57_CPU + RCAR_CA57CPU_NUM_MAX)))
if (reg & (1U << (STATE_CA57_CPU + RCAR_CA57CPU_NUM_MAX)))
goto done;
for (i = 0; i < RCAR_CA57CPU_NUM_MAX; i++) {

2
drivers/renesas/rcar/pwrc/pwrc.h
View file

@ -15,7 +15,7 @@
#define PWKUPR_WEN (1ull << 31)
#define PSYSR_AFF_L2 (1 << 31)
#define PSYSR_AFF_L2 (1U << 31)
#define PSYSR_AFF_L1 (1 << 30)
#define PSYSR_AFF_L0 (1 << 29)
#define PSYSR_WEN (1 << 28)

4
plat/renesas/rcar/rcar_common.c
View file

@ -18,10 +18,10 @@
#define MSTP318 (1 << 18)
#define MSTP319 (1 << 19)
#define PMSR 0x5c
#define PMSR_L1FAEG (1 << 31)
#define PMSR_L1FAEG (1U << 31)
#define PMSR_PMEL1RX (1 << 23)
#define PMCTLR 0x60
#define PMSR_L1IATN (1 << 31)
#define PMSR_L1IATN (1U << 31)
static int rcar_pcie_fixup(unsigned int controller)
{