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feat(s32g274a): enable BL2 early clocks
s32cc_init_early_clks will be used to increase the frequency of the clocks which have a performance impact on BL2 boot. This set includes A53, XBAR, DDR and Linflex clocks. For now, it will only contain the frequency set for FXOSC. More clock management will be added in the next commits. Change-Id: Ie85465884de02f5082185f91749f190f40249c2e Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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d937351987
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5 changed files with 49 additions and 0 deletions
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@ -11,6 +11,8 @@ CLK_SOURCES := \
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${PLAT_DRIVERS_PATH}/clk/s32cc/s32cc_clk_drv.c \
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${PLAT_DRIVERS_PATH}/clk/s32cc/s32cc_clk_modules.c \
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${PLAT_DRIVERS_PATH}/clk/s32cc/s32cc_clk_utils.c \
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${PLAT_DRIVERS_PATH}/clk/s32cc/s32cc_early_clks.c \
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drivers/clk/clk.c \
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ifeq (${BL_COMM_CLK_NEEDED},yes)
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BL2_SOURCES += ${CLK_SOURCES}
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25
drivers/nxp/clk/s32cc/s32cc_early_clks.c
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drivers/nxp/clk/s32cc/s32cc_early_clks.c
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@ -0,0 +1,25 @@
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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <drivers/clk.h>
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#include <s32cc-clk-drv.h>
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#include <s32cc-clk-ids.h>
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#include <s32cc-clk-utils.h>
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#define S32CC_FXOSC_FREQ (40U * MHZ)
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int s32cc_init_early_clks(void)
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{
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int ret;
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s32cc_clk_register_drv();
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ret = clk_set_rate(S32CC_CLK_FXOSC, S32CC_FXOSC_FREQ, NULL);
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if (ret != 0) {
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return ret;
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}
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return ret;
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}
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11
include/drivers/nxp/clk/s32cc/s32cc-clk-drv.h
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include/drivers/nxp/clk/s32cc/s32cc-clk-drv.h
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@ -0,0 +1,11 @@
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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef S32CC_CLK_DRV_H
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#define S32CC_CLK_DRV_H
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int s32cc_init_early_clks(void);
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#endif
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@ -13,4 +13,6 @@ struct s32cc_clk *s32cc_get_clk_from_table(const struct s32cc_clk_array *const *
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struct s32cc_clk *s32cc_get_arch_clk(unsigned long id);
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void s32cc_clk_register_drv(void);
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#endif /* S32CC_CLK_UTILS_H */
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@ -4,10 +4,12 @@
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <common/desc_image_load.h>
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#include <lib/mmio.h>
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#include <plat/common/platform.h>
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#include <plat_console.h>
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#include <s32cc-clk-drv.h>
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#include <plat_io_storage.h>
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#define SIUL2_PC09_MSCR UL(0x4009C2E4)
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@ -50,6 +52,13 @@ static void linflex_config_pinctrl(void)
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void bl2_el3_early_platform_setup(u_register_t arg0, u_register_t arg1,
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u_register_t arg2, u_register_t arg3)
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{
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int ret;
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ret = s32cc_init_early_clks();
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if (ret != 0) {
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panic();
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}
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linflex_config_pinctrl();
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console_s32g2_register();
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