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refactor(cpus): reorder Cortex-x2 errata by ascending order
Change-Id: Ic1b2c73f468db6bb434b5b23f345bfc37d2a7833 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
This commit is contained in:
Jayanth Dodderi Chidanand
parent
38f762a5ee
commit
64733b3912
1 changed files with 96 additions and 96 deletions
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@ -60,6 +60,34 @@ func check_errata_2002765
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b cpu_rev_var_ls
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endfunc check_errata_2002765
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/* --------------------------------------------------
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* Errata Workaround for Cortex-X2 Errata 2017096.
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* This applies only to revisions r0p0, r1p0 and r2p0
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* and is fixed in r2p1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0, x1, x17
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* --------------------------------------------------
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*/
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func errata_x2_2017096_wa
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/* Compare x0 against revision r0p0 to r2p0 */
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mov x17, x30
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bl check_errata_2017096
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cbz x0, 1f
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mrs x1, CORTEX_X2_CPUECTLR_EL1
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orr x1, x1, CORTEX_X2_CPUECTLR_EL1_PFSTIDIS_BIT
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msr CORTEX_X2_CPUECTLR_EL1, x1
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1:
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ret x17
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endfunc errata_x2_2017096_wa
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func check_errata_2017096
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/* Applies to r0p0, r1p0, r2p0 */
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mov x1, #0x20
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b cpu_rev_var_ls
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endfunc check_errata_2017096
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/* --------------------------------------------------
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* Errata Workaround for Cortex X2 Errata #2058056.
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* This applies to revisions r0p0, r1p0, and r2p0 and
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@ -89,63 +117,6 @@ func check_errata_2058056
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b cpu_rev_var_ls
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endfunc check_errata_2058056
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/* --------------------------------------------------
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* Errata Workaround for Cortex X2 Errata #2083908.
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* This applies to revision r2p0 and is open.
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x2, x17
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* --------------------------------------------------
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*/
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func errata_cortex_x2_2083908_wa
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/* Check workaround compatibility. */
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mov x17, x30
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bl check_errata_2083908
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cbz x0, 1f
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/* Apply the workaround by setting bit 13 in CPUACTLR5_EL1. */
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mrs x1, CORTEX_X2_CPUACTLR5_EL1
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orr x1, x1, #BIT(13)
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msr CORTEX_X2_CPUACTLR5_EL1, x1
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1:
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ret x17
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endfunc errata_cortex_x2_2083908_wa
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func check_errata_2083908
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/* Applies to r2p0 */
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mov x1, #0x20
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mov x2, #0x20
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b cpu_rev_var_range
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endfunc check_errata_2083908
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/* --------------------------------------------------
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* Errata Workaround for Cortex-X2 Errata 2017096.
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* This applies only to revisions r0p0, r1p0 and r2p0
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* and is fixed in r2p1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0, x1, x17
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* --------------------------------------------------
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*/
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func errata_x2_2017096_wa
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/* Compare x0 against revision r0p0 to r2p0 */
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mov x17, x30
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bl check_errata_2017096
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cbz x0, 1f
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mrs x1, CORTEX_X2_CPUECTLR_EL1
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orr x1, x1, CORTEX_X2_CPUECTLR_EL1_PFSTIDIS_BIT
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msr CORTEX_X2_CPUECTLR_EL1, x1
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1:
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ret x17
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endfunc errata_x2_2017096_wa
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func check_errata_2017096
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/* Applies to r0p0, r1p0, r2p0 */
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mov x1, #0x20
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b cpu_rev_var_ls
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endfunc check_errata_2017096
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/* --------------------------------------------------
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* Errata Workaround for Cortex-X2 Errata 2081180.
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* This applies to revision r0p0, r1p0 and r2p0
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@ -189,6 +160,65 @@ func check_errata_2081180
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b cpu_rev_var_ls
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endfunc check_errata_2081180
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/* --------------------------------------------------
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* Errata Workaround for Cortex X2 Errata #2083908.
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* This applies to revision r2p0 and is open.
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x2, x17
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* --------------------------------------------------
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*/
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func errata_cortex_x2_2083908_wa
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/* Check workaround compatibility. */
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mov x17, x30
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bl check_errata_2083908
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cbz x0, 1f
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/* Apply the workaround by setting bit 13 in CPUACTLR5_EL1. */
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mrs x1, CORTEX_X2_CPUACTLR5_EL1
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orr x1, x1, #BIT(13)
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msr CORTEX_X2_CPUACTLR5_EL1, x1
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1:
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ret x17
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endfunc errata_cortex_x2_2083908_wa
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func check_errata_2083908
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/* Applies to r2p0 */
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mov x1, #0x20
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mov x2, #0x20
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b cpu_rev_var_range
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endfunc check_errata_2083908
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/* ---------------------------------------------------------
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* Errata Workaround for Cortex-X2 Errata 2147715.
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* This applies only to revisions r2p0 and is fixed in r2p1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0, x1, x17
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* ---------------------------------------------------------
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*/
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func errata_x2_2147715_wa
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/* Compare x0 against revision r2p0 */
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mov x17, x30
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bl check_errata_2147715
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cbz x0, 1f
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/* Apply the workaround by setting bit 22 in CPUACTLR_EL1. */
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mrs x1, CORTEX_X2_CPUACTLR_EL1
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orr x1, x1, CORTEX_X2_CPUACTLR_EL1_BIT_22
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msr CORTEX_X2_CPUACTLR_EL1, x1
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1:
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ret x17
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endfunc errata_x2_2147715_wa
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func check_errata_2147715
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/* Applies to r2p0 */
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mov x1, #0x20
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mov x2, #0x20
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b cpu_rev_var_range
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endfunc check_errata_2147715
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/* --------------------------------------------------
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* Errata Workaround for Cortex X2 Errata 2216384.
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* This applies to revisions r0p0, r1p0, and r2p0
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@ -228,45 +258,6 @@ func check_errata_2216384
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b cpu_rev_var_ls
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endfunc check_errata_2216384
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func check_errata_cve_2022_23960
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#if WORKAROUND_CVE_2022_23960
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mov x0, #ERRATA_APPLIES
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#else
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mov x0, #ERRATA_MISSING
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#endif
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ret
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endfunc check_errata_cve_2022_23960
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/* ---------------------------------------------------------
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* Errata Workaround for Cortex-X2 Errata 2147715.
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* This applies only to revisions r2p0 and is fixed in r2p1.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0, x1, x17
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* ---------------------------------------------------------
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*/
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func errata_x2_2147715_wa
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/* Compare x0 against revision r2p0 */
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mov x17, x30
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bl check_errata_2147715
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cbz x0, 1f
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/* Apply the workaround by setting bit 22 in CPUACTLR_EL1. */
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mrs x1, CORTEX_X2_CPUACTLR_EL1
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orr x1, x1, CORTEX_X2_CPUACTLR_EL1_BIT_22
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msr CORTEX_X2_CPUACTLR_EL1, x1
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1:
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ret x17
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endfunc errata_x2_2147715_wa
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func check_errata_2147715
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/* Applies to r2p0 */
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mov x1, #0x20
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mov x2, #0x20
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b cpu_rev_var_range
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endfunc check_errata_2147715
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/* ---------------------------------------------------------------
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* Errata Workaround for Cortex-X2 Erratum 2282622.
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* This applies to revision r0p0, r1p0, r2p0 and r2p1.
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@ -349,6 +340,15 @@ func check_errata_2768515
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b cpu_rev_var_ls
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endfunc check_errata_2768515
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func check_errata_cve_2022_23960
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#if WORKAROUND_CVE_2022_23960
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mov x0, #ERRATA_APPLIES
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#else
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mov x0, #ERRATA_MISSING
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#endif
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ret
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endfunc check_errata_cve_2022_23960
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/* ----------------------------------------------------
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* HW will do the cache maintenance while powering down
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* ----------------------------------------------------
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