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feat(nxp-clk): add clock objects for CGM dividers

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The CGM dividers are controllable dividers attached to a CGM mux. Its
divison factor can be controlled through the MC_CGM's registers.

Change-Id: Id2786a46c5a1d389ca32a4839c7158949aec3b0a
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
This commit is contained in:
Ghennadi Procopciuc 2025-01-23 10:34:35 +02:00
parent 29f8a952cb
commit 63d536fe18
2 changed files with 27 additions and 2 deletions
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4
drivers/nxp/clk/s32cc/s32cc_clk_drv.c
View file

@ -1136,7 +1136,7 @@ static int enable_module(struct s32cc_clk_obj *module,
unsigned int depth) unsigned int depth)
{ {
struct s32cc_clk_obj *parent = get_module_parent(module); struct s32cc_clk_obj *parent = get_module_parent(module);
static const enable_clk_t enable_clbs[12] = { static const enable_clk_t enable_clbs[13] = {
[s32cc_clk_t] = no_enable, [s32cc_clk_t] = no_enable,
[s32cc_osc_t] = enable_osc, [s32cc_osc_t] = enable_osc,
[s32cc_pll_t] = enable_pll, [s32cc_pll_t] = enable_pll,
@ -1867,7 +1867,7 @@ typedef struct s32cc_clk_obj *(*get_parent_clb_t)(const struct s32cc_clk_obj *cl
static struct s32cc_clk_obj *get_module_parent(const struct s32cc_clk_obj *module) static struct s32cc_clk_obj *get_module_parent(const struct s32cc_clk_obj *module)
{ {
static const get_parent_clb_t parents_clbs[12] = { static const get_parent_clb_t parents_clbs[13] = {
[s32cc_clk_t] = get_clk_parent, [s32cc_clk_t] = get_clk_parent,
[s32cc_osc_t] = get_no_parent, [s32cc_osc_t] = get_no_parent,
[s32cc_pll_t] = get_pll_parent, [s32cc_pll_t] = get_pll_parent,

25
include/drivers/nxp/clk/s32cc/s32cc-clk-modules.h
View file

@ -19,6 +19,7 @@ enum s32cc_clkm_type {
s32cc_pll_out_div_t, s32cc_pll_out_div_t,
s32cc_dfs_t, s32cc_dfs_t,
s32cc_dfs_div_t, s32cc_dfs_div_t,
s32cc_cgm_div_t,
s32cc_clkmux_t, s32cc_clkmux_t,
s32cc_shared_clkmux_t, s32cc_shared_clkmux_t,
s32cc_fixed_div_t, s32cc_fixed_div_t,
@ -288,6 +289,22 @@ struct s32cc_part_block_link {
.block = (BLOCK), \ .block = (BLOCK), \
} }
struct s32cc_cgm_div {
struct s32cc_clk_obj desc;
struct s32cc_clk_obj *parent;
unsigned long freq;
uint32_t index;
};
#define S32CC_CGM_DIV_INIT(PARENT, INDEX) \
{ \
.desc = { \
.type = s32cc_cgm_div_t, \
}, \
.parent = &(PARENT).desc, \
.index = (INDEX), \
}
static inline struct s32cc_osc *s32cc_obj2osc(const struct s32cc_clk_obj *mod) static inline struct s32cc_osc *s32cc_obj2osc(const struct s32cc_clk_obj *mod)
{ {
uintptr_t osc_addr; uintptr_t osc_addr;
@ -400,4 +417,12 @@ s32cc_obj2partblocklink(const struct s32cc_clk_obj *mod)
return (struct s32cc_part_block_link *)blk_link; return (struct s32cc_part_block_link *)blk_link;
} }
static inline struct s32cc_cgm_div *s32cc_obj2cgmdiv(const struct s32cc_clk_obj *mod)
{
uintptr_t cgm_div_addr;
cgm_div_addr = ((uintptr_t)mod) - offsetof(struct s32cc_cgm_div, desc);
return (struct s32cc_cgm_div *)cgm_div_addr;
}
#endif /* S32CC_CLK_MODULES_H */ #endif /* S32CC_CLK_MODULES_H */