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refactor(st-ddr): move basic tests in a dedicated file
These basic tests are generic and should be used independently of the driver, depending on the plaftorm characteristics. Change-Id: I38161b659ef2a23fd30a56e1c9b1bd98461a2fe4 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
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06e55dc842
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63d2159846
4 changed files with 170 additions and 120 deletions
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@ -14,15 +14,13 @@
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#include <drivers/st/stm32mp1_ddr_helpers.h>
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#include <drivers/st/stm32mp1_ram.h>
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#include <drivers/st/stm32mp_ddr.h>
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#include <drivers/st/stm32mp_ddr_test.h>
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#include <drivers/st/stm32mp_ram.h>
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#include <lib/mmio.h>
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#include <libfdt.h>
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#include <platform_def.h>
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#define DDR_PATTERN 0xAAAAAAAAU
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#define DDR_ANTIPATTERN 0x55555555U
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static struct stm32mp_ddr_priv ddr_priv_data;
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int stm32mp1_ddr_clk_enable(struct stm32mp_ddr_priv *priv, uint32_t mem_speed)
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@ -52,119 +50,6 @@ int stm32mp1_ddr_clk_enable(struct stm32mp_ddr_priv *priv, uint32_t mem_speed)
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return 0;
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}
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/*******************************************************************************
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* This function tests the DDR data bus wiring.
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* This is inspired from the Data Bus Test algorithm written by Michael Barr
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* in "Programming Embedded Systems in C and C++" book.
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* resources.oreilly.com/examples/9781565923546/blob/master/Chapter6/
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* File: memtest.c - This source code belongs to Public Domain.
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* Returns 0 if success, and address value else.
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******************************************************************************/
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static uint32_t ddr_test_data_bus(void)
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{
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uint32_t pattern;
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for (pattern = 1U; pattern != 0U; pattern <<= 1) {
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mmio_write_32(STM32MP_DDR_BASE, pattern);
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if (mmio_read_32(STM32MP_DDR_BASE) != pattern) {
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return (uint32_t)STM32MP_DDR_BASE;
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}
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}
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return 0;
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}
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/*******************************************************************************
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* This function tests the DDR address bus wiring.
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* This is inspired from the Data Bus Test algorithm written by Michael Barr
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* in "Programming Embedded Systems in C and C++" book.
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* resources.oreilly.com/examples/9781565923546/blob/master/Chapter6/
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* File: memtest.c - This source code belongs to Public Domain.
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* Returns 0 if success, and address value else.
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******************************************************************************/
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static uint32_t ddr_test_addr_bus(void)
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{
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uint64_t addressmask = (ddr_priv_data.info.size - 1U);
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uint64_t offset;
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uint64_t testoffset = 0;
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/* Write the default pattern at each of the power-of-two offsets. */
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for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
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offset <<= 1) {
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mmio_write_32(STM32MP_DDR_BASE + (uint32_t)offset,
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DDR_PATTERN);
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}
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/* Check for address bits stuck high. */
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mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
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DDR_ANTIPATTERN);
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for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
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offset <<= 1) {
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if (mmio_read_32(STM32MP_DDR_BASE + (uint32_t)offset) !=
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DDR_PATTERN) {
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return (uint32_t)(STM32MP_DDR_BASE + offset);
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}
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}
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mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset, DDR_PATTERN);
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/* Check for address bits stuck low or shorted. */
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for (testoffset = sizeof(uint32_t); (testoffset & addressmask) != 0U;
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testoffset <<= 1) {
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mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
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DDR_ANTIPATTERN);
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if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) {
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return STM32MP_DDR_BASE;
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}
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for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
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offset <<= 1) {
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if ((mmio_read_32(STM32MP_DDR_BASE +
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(uint32_t)offset) != DDR_PATTERN) &&
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(offset != testoffset)) {
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return (uint32_t)(STM32MP_DDR_BASE + offset);
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}
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}
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mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
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DDR_PATTERN);
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}
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return 0;
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}
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/*******************************************************************************
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* This function checks the DDR size. It has to be run with Data Cache off.
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* This test is run before data have been put in DDR, and is only done for
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* cold boot. The DDR data can then be overwritten, and it is not useful to
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* restore its content.
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* Returns DDR computed size.
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******************************************************************************/
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static uint32_t ddr_check_size(void)
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{
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uint32_t offset = sizeof(uint32_t);
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mmio_write_32(STM32MP_DDR_BASE, DDR_PATTERN);
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while (offset < STM32MP_DDR_MAX_SIZE) {
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mmio_write_32(STM32MP_DDR_BASE + offset, DDR_ANTIPATTERN);
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dsb();
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if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) {
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break;
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}
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offset <<= 1;
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}
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INFO("Memory size = 0x%x (%d MB)\n", offset, offset / (1024U * 1024U));
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return offset;
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}
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static int stm32mp1_ddr_setup(void)
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{
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struct stm32mp_ddr_priv *priv = &ddr_priv_data;
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@ -220,21 +105,21 @@ static int stm32mp1_ddr_setup(void)
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panic();
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}
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uret = ddr_test_data_bus();
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uret = stm32mp_ddr_test_data_bus();
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if (uret != 0U) {
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ERROR("DDR data bus test: can't access memory @ 0x%x\n",
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uret);
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panic();
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}
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uret = ddr_test_addr_bus();
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uret = stm32mp_ddr_test_addr_bus(config.info.size);
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if (uret != 0U) {
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ERROR("DDR addr bus test: can't access memory @ 0x%x\n",
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uret);
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panic();
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}
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uret = ddr_check_size();
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uret = stm32mp_ddr_check_size();
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if (uret < config.info.size) {
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ERROR("DDR size: 0x%x does not match DT config: 0x%x\n",
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uret, config.info.size);
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147
drivers/st/ddr/stm32mp_ddr_test.c
Normal file
147
drivers/st/ddr/stm32mp_ddr_test.c
Normal file
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@ -0,0 +1,147 @@
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/*
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* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <drivers/st/stm32mp_ddr_test.h>
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#include <lib/mmio.h>
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#include <platform_def.h>
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#define DDR_PATTERN 0xAAAAAAAAU
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#define DDR_ANTIPATTERN 0x55555555U
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/*******************************************************************************
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* This function tests a simple read/write access to the DDR.
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* Note that the previous content is restored after test.
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* Returns 0 if success, and address value else.
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******************************************************************************/
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uint32_t stm32mp_ddr_test_rw_access(void)
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{
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uint32_t saved_value = mmio_read_32(STM32MP_DDR_BASE);
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mmio_write_32(STM32MP_DDR_BASE, DDR_PATTERN);
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if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) {
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return (uint32_t)STM32MP_DDR_BASE;
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}
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mmio_write_32(STM32MP_DDR_BASE, saved_value);
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return 0U;
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}
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/*******************************************************************************
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* This function tests the DDR data bus wiring.
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* This is inspired from the Data Bus Test algorithm written by Michael Barr
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* in "Programming Embedded Systems in C and C++" book.
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* resources.oreilly.com/examples/9781565923546/blob/master/Chapter6/
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* File: memtest.c - This source code belongs to Public Domain.
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* Returns 0 if success, and address value else.
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******************************************************************************/
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uint32_t stm32mp_ddr_test_data_bus(void)
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{
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uint32_t pattern;
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for (pattern = 1U; pattern != 0U; pattern <<= 1U) {
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mmio_write_32(STM32MP_DDR_BASE, pattern);
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if (mmio_read_32(STM32MP_DDR_BASE) != pattern) {
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return (uint32_t)STM32MP_DDR_BASE;
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}
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}
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return 0;
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}
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/*******************************************************************************
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* This function tests the DDR address bus wiring.
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* This is inspired from the Data Bus Test algorithm written by Michael Barr
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* in "Programming Embedded Systems in C and C++" book.
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* resources.oreilly.com/examples/9781565923546/blob/master/Chapter6/
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* File: memtest.c - This source code belongs to Public Domain.
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* size: size in bytes of the DDR memory device.
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* Returns 0 if success, and address value else.
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******************************************************************************/
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uint32_t stm32mp_ddr_test_addr_bus(uint64_t size)
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{
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uint64_t addressmask = size - 1U;
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uint64_t offset;
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uint64_t testoffset = 0U;
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/* Write the default pattern at each of the power-of-two offsets. */
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for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
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offset <<= 1U) {
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mmio_write_32(STM32MP_DDR_BASE + (uint32_t)offset,
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DDR_PATTERN);
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}
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/* Check for address bits stuck high. */
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mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
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DDR_ANTIPATTERN);
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for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
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offset <<= 1U) {
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if (mmio_read_32(STM32MP_DDR_BASE + (uint32_t)offset) !=
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DDR_PATTERN) {
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return (uint32_t)(STM32MP_DDR_BASE + offset);
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}
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}
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mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset, DDR_PATTERN);
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/* Check for address bits stuck low or shorted. */
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for (testoffset = sizeof(uint32_t); (testoffset & addressmask) != 0U;
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testoffset <<= 1U) {
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mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
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DDR_ANTIPATTERN);
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if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) {
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return STM32MP_DDR_BASE;
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}
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for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
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offset <<= 1) {
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if ((mmio_read_32(STM32MP_DDR_BASE +
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(uint32_t)offset) != DDR_PATTERN) &&
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(offset != testoffset)) {
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return (uint32_t)(STM32MP_DDR_BASE + offset);
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}
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}
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mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
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DDR_PATTERN);
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}
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return 0U;
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}
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/*******************************************************************************
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* This function checks the DDR size. It has to be run with Data Cache off.
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* This test is run before data have been put in DDR, and is only done for
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* cold boot. The DDR data can then be overwritten, and it is not useful to
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* restore its content.
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* Returns DDR computed size.
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******************************************************************************/
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uint32_t stm32mp_ddr_check_size(void)
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{
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uint32_t offset = sizeof(uint32_t);
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mmio_write_32(STM32MP_DDR_BASE, DDR_PATTERN);
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while (offset < STM32MP_DDR_MAX_SIZE) {
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mmio_write_32(STM32MP_DDR_BASE + offset, DDR_ANTIPATTERN);
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dsb();
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if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) {
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break;
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}
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offset <<= 1U;
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}
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INFO("Memory size = 0x%x (%u MB)\n", offset, offset / (1024U * 1024U));
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return offset;
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}
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include/drivers/st/stm32mp_ddr_test.h
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17
include/drivers/st/stm32mp_ddr_test.h
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/*
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* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef STM32MP_DDR_TEST_H
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#define STM32MP_DDR_TEST_H
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#include <stdint.h>
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uint32_t stm32mp_ddr_test_rw_access(void);
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uint32_t stm32mp_ddr_test_data_bus(void);
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uint32_t stm32mp_ddr_test_addr_bus(uint64_t size);
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uint32_t stm32mp_ddr_check_size(void);
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#endif /* STM32MP_DDR_TEST_H */
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@ -297,7 +297,8 @@ BL2_SOURCES += drivers/st/usb/stm32mp1_usb.c \
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plat/st/stm32mp1/stm32mp1_usb_dfu.c
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endif
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BL2_SOURCES += drivers/st/ddr/stm32mp_ram.c \
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BL2_SOURCES += drivers/st/ddr/stm32mp_ddr_test.c \
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drivers/st/ddr/stm32mp_ram.c \
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drivers/st/ddr/stm32mp1_ddr.c \
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drivers/st/ddr/stm32mp1_ram.c
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