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feat(plat/rcar3): add SYSCEXTMASK bit set/clear in scu_power_up

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Added the process of SYSECEXTMASK bit set/clear for following
power Resume/Shutoff flow.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I71ed22840a42e7ab7d87bfd4241eec6f5ddb129b
This commit is contained in:
Toshiyuki Ogasahara 2021-07-12 19:13:17 +09:00 • committed by Marek Vasut
parent a4d821a5a6
commit 63a7a34706
2 changed files with 24 additions and 0 deletions
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22
drivers/renesas/common/pwrc/pwrc.c
View file

@ -44,6 +44,7 @@ RCAR_INSTANTIATE_LOCK
#define CPU_PWR_OFF (0x00000003U)
#define RCAR_PSTR_MASK (0x00000003U)
#define ST_ALL_STANDBY (0x00003333U)
#define SYSCEXTMASK_EXTMSK0 (0x00000001U)
/* Suspend to ram */
#define DBSC4_REG_BASE (0xE6790000U)
#define DBSC4_REG_DBSYSCNT0 (DBSC4_REG_BASE + 0x0100U)
@ -191,6 +192,8 @@ static void scu_power_up(uint64_t mpidr)
{
uintptr_t reg_pwrsr, reg_cpumcr, reg_pwron, reg_pwrer;
uint32_t c, sysc_reg_bit;
uint32_t lsi_product;
uint32_t lsi_cut;
c = rcar_pwrc_get_mpidr_cluster(mpidr);
reg_cpumcr = IS_CA57(c) ? RCAR_CA57CPUCMCR : RCAR_CA53CPUCMCR;
@ -205,6 +208,17 @@ static void scu_power_up(uint64_t mpidr)
if (mmio_read_32(reg_cpumcr) != 0)
mmio_write_32(reg_cpumcr, 0);
lsi_product = mmio_read_32((uintptr_t)RCAR_PRR);
lsi_cut = lsi_product & PRR_CUT_MASK;
lsi_product &= PRR_PRODUCT_MASK;
if ((lsi_product == PRR_PRODUCT_M3 && lsi_cut >= PRR_PRODUCT_30) ||
lsi_product == PRR_PRODUCT_H3 ||
lsi_product == PRR_PRODUCT_M3N ||
lsi_product == PRR_PRODUCT_E3) {
mmio_setbits_32(RCAR_SYSCEXTMASK, SYSCEXTMASK_EXTMSK0);
}
mmio_setbits_32(RCAR_SYSCIER, sysc_reg_bit);
mmio_setbits_32(RCAR_SYSCIMR, sysc_reg_bit);
@ -217,6 +231,14 @@ static void scu_power_up(uint64_t mpidr)
while ((mmio_read_32(RCAR_SYSCISR) & sysc_reg_bit) == 0)
;
mmio_write_32(RCAR_SYSCISR, sysc_reg_bit);
if ((lsi_product == PRR_PRODUCT_M3 && lsi_cut >= PRR_PRODUCT_30) ||
lsi_product == PRR_PRODUCT_H3 ||
lsi_product == PRR_PRODUCT_M3N ||
lsi_product == PRR_PRODUCT_E3) {
mmio_clrbits_32(RCAR_SYSCEXTMASK, SYSCEXTMASK_EXTMSK0);
}
while ((mmio_read_32(reg_pwrsr) & STATUS_PWRUP) == 0)
;
}

2
plat/renesas/common/include/rcar_def.h
View file

@ -148,6 +148,8 @@
#define RCAR_PWRER5 U(0xE61801D4) /* shutoff/resume error */
#define RCAR_SYSCISR U(0xE6180004) /* Interrupt status */
#define RCAR_SYSCISCR U(0xE6180008) /* Interrupt stat clear */
#define RCAR_SYSCEXTMASK U(0xE61802F8) /* External Request Mask */
/* H3/H3-N, M3 v3.0, M3-N, E3 */
/* Product register */
#define RCAR_PRR U(0xFFF00044)
#define RCAR_M3_CUT_VER11 U(0x00000010) /* M3 Ver.1.1/Ver.1.2 */