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docs(n1sdp): add N1SDP PSCI instrumentation data
Change-Id: Id22715cb1d36edf6cb8719f3a0415993f067e7c9 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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@ -7,6 +7,7 @@ Performance & Testing
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psci-performance-instr
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psci-performance-juno
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psci-performance-n1sdp
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psci-performance-methodology
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tsp
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performance-monitoring-unit
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203
docs/perf/psci-performance-n1sdp.rst
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203
docs/perf/psci-performance-n1sdp.rst
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@ -0,0 +1,203 @@
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Runtime Instrumentation Testing - N1SDP
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=======================================
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For this test we used the N1 System Development Platform (`N1SDP`_), which
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contains an SoC consisting of two dual-core Arm N1 clusters.
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The following source trees and binaries were used:
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- TF-A [`v2.9-rc0-16-g666aec401`_]
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- TFTF [`v2.9-rc0`_]
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- SCP/MCP `Prebuilt Images`_
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Please see the Runtime Instrumentation `Testing Methodology`_ page for more
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details.
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Procedure
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---------
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#. Build TFTF with runtime instrumentation enabled:
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.. code:: shell
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make CROSS_COMPILE=aarch64-none-elf- PLAT=n1sdp \
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TESTS=runtime-instrumentation all
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#. Build TF-A with the following build options:
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.. code:: shell
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make CROSS_COMPILE=aarch64-none-elf- PLAT=n1sdp \
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ENABLE_RUNTIME_INSTRUMENTATION=1 fiptool all
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#. Fetch the SCP firmware images:
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.. code:: shell
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curl --fail --connect-timeout 5 --retry 5 \
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-sLS -o build/n1sdp/release/scp_rom.bin \
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https://downloads.trustedfirmware.org/tf-a/css_scp_2.12.0/n1sdp/release/n1sdp-bl1.bin
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curl --fail --connect-timeout 5 \
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--retry 5 -sLS -o build/n1sdp/release/scp_ram.bin \
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https://downloads.trustedfirmware.org/tf-a/css_scp_2.12.0/n1sdp/release/n1sdp-bl2.bin
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#. Fetch the MCP firmware images:
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.. code:: shell
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curl --fail --connect-timeout 5 --retry 5 \
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-sLS -o build/n1sdp/release/mcp_rom.bin \
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https://downloads.trustedfirmware.org/tf-a/css_scp_2.12.0/n1sdp/release/n1sdp-mcp-bl1.bin
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curl --fail --connect-timeout 5 --retry 5 \
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-sLS -o build/n1sdp/release/mcp_ram.bin \
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https://downloads.trustedfirmware.org/tf-a/css_scp_2.12.0/n1sdp/release/n1sdp-mcp-bl2.bin
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#. Using the fiptool, create a new FIP package and append the SCP ram image onto
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it.
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.. code:: shell
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./tools/fiptool/fiptool create --blob \
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uuid=cfacc2c4-15e8-4668-82be-430a38fad705,file=build/n1sdp/release/bl1.bin \
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--scp-fw build/n1sdp/release/scp_ram.bin build/n1sdp/release/scp_fw.bin
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#. Append the MCP image to the FIP.
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.. code:: shell
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./tools/fiptool/fiptool create \
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--blob uuid=54464222-a4cf-4bf8-b1b6-cee7dade539e,file=build/n1sdp/release/mcp_ram.bin \
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build/n1sdp/release/mcp_fw.bin
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#. Then, add TFTF as the Non-Secure workload in the FIP image:
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.. code:: shell
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make CROSS_COMPILE=aarch64-none-elf- PLAT=n1sdp \
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ENABLE_RUNTIME_INSTRUMENTATION=1 SCP_BL2=/dev/null \
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BL33=<path/to/tftf.bin> fip
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#. Load the following images onto the development board: ``fip.bin``,
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``scp_rom.bin``, ``scp_ram.bin``, ``mcp_rom.bin``, and ``mcp_ram.bin``.
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.. note::
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These instructions presume you have a complete firmware stack. The N1SDP
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`user guide`_ provides a detailed explanation on how to get setup from
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scratch.
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Results
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-------
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``CPU_SUSPEND`` to deepest power level
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
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parallel
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+---------+------+-----------+---------+-------------+
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| Cluster | Core | Powerdown | Wakekup | Cache Flush |
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+=========+======+===========+=========+=============+
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| 0 | 0 | 3.44 | 10.04 | 0.4 |
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+---------+------+-----------+---------+-------------+
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| 0 | 1 | 4.98 | 12.72 | 0.16 |
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+---------+------+-----------+---------+-------------+
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| 1 | 0 | 3.58 | 15.42 | 0.2 |
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+---------+------+-----------+---------+-------------+
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| 1 | 1 | 5.24 | 17.78 | 0.18 |
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+---------+------+-----------+---------+-------------+
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.. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
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serial
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+---------+------+-----------+---------+-------------+
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| Cluster | Core | Powerdown | Wakekup | Cache Flush |
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+=========+======+===========+=========+=============+
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| 0 | 0 | 1.82 | 9.98 | 0.32 |
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+---------+------+-----------+---------+-------------+
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| 0 | 1 | 1.96 | 9.96 | 0.18 |
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+---------+------+-----------+---------+-------------+
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| 1 | 0 | 2.0 | 10.5 | 0.16 |
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+---------+------+-----------+---------+-------------+
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| 1 | 1 | 2.22 | 10.56 | 0.16 |
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+---------+------+-----------+---------+-------------+
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``CPU_SUSPEND`` to power level 0
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in
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parallel
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+---------+------+-----------+---------+-------------+
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| Cluster | Core | Powerdown | Wakekup | Cache Flush |
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+=========+======+===========+=========+=============+
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| 0 | 0 | 1.52 | 11.84 | 0.34 |
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+---------+------+-----------+---------+-------------+
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| 0 | 1 | 1.1 | 13.66 | 0.14 |
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+---------+------+-----------+---------+-------------+
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| 1 | 0 | 2.18 | 9.48 | 0.18 |
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+---------+------+-----------+---------+-------------+
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| 1 | 1 | 2.06 | 14.4 | 0.16 |
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+---------+------+-----------+---------+-------------+
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.. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial
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+---------+------+-----------+---------+-------------+
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| Cluster | Core | Powerdown | Wakekup | Cache Flush |
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+=========+======+===========+=========+=============+
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| 0 | 0 | 1.54 | 9.34 | 0.3 |
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+---------+------+-----------+---------+-------------+
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| 0 | 1 | 1.88 | 9.5 | 0.16 |
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+---------+------+-----------+---------+-------------+
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| 1 | 0 | 1.86 | 9.86 | 0.2 |
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+---------+------+-----------+---------+-------------+
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| 1 | 1 | 2.02 | 9.64 | 0.18 |
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+---------+------+-----------+---------+-------------+
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``CPU_OFF`` on all non-lead CPUs
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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``CPU_OFF`` on all non-lead CPUs in sequence then, ``CPU_SUSPEND`` on the lead
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core to the deepest power level.
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.. table:: ``CPU_OFF`` latencies (µs) on all non-lead CPUs
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+---------+------+-----------+---------+-------------+
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| Cluster | Core | Powerdown | Wakekup | Cache Flush |
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+=========+======+===========+=========+=============+
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| 0 | 0 | 1.86 | 9.88 | 0.32 |
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+---------+------+-----------+---------+-------------+
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| 0 | 1 | 21.1 | 12.44 | 0.42 |
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+---------+------+-----------+---------+-------------+
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| 1 | 0 | 21.22 | 13.2 | 0.32 |
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+---------+------+-----------+---------+-------------+
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| 1 | 1 | 21.56 | 13.18 | 0.54 |
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+---------+------+-----------+---------+-------------+
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``CPU_VERSION`` in parallel
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~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. table:: ``CPU_VERSION`` latency (µs) in parallel on all cores
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+-------------+--------+--------------+
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| Cluster | Core | Latency |
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+=============+========+==============+
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| 0 | 0 | 0.08 |
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+-------------+--------+--------------+
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| 0 | 1 | 0.22 |
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+-------------+--------+--------------+
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| 1 | 0 | 0.28 |
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+-------------+--------+--------------+
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| 1 | 1 | 0.26 |
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+-------------+--------+--------------+
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--------------
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*Copyright (c) 2023, Arm Limited. All rights reserved.*
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.. _v2.9-rc0-16-g666aec401: https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/heads/v2.9-rc0-16-g666aec401
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.. _v2.9-rc0: https://review.trustedfirmware.org/plugins/gitiles/TF-A/tf-a-tests/+/refs/tags/v2.9-rc0
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.. _user guide: https://gitlab.arm.com/arm-reference-solutions/arm-reference-solutions-docs/-/blob/master/docs/n1sdp/user-guide.rst
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.. _Prebuilt Images: https://downloads.trustedfirmware.org/tf-a/css_scp_2.11.0/n1sdp/release/
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.. _N1SDP: https://developer.arm.com/documentation/101489/latest
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.. _Testing Methodology: ../perf/psci-performance-methodology.html
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