Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-16 01:24:27 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

feat(tc): add MCN PMU nodes in dts for TC4

Browse source 
Add MCN PMU nodes in dts for TC4 to use MCN PMU driver in
kernel with perf.

Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
Change-Id: I1a85ba646604336ce3f16c28171589af78f65251
This commit is contained in:
Jagdish Gediya 2024-06-19 08:52:48 +00:00 • committed by Icen Zeyada
parent 2d967e92e0
commit 624deb0825
3 changed files with 40 additions and 20 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

20
fdts/tc3-4-base.dtsi
View file

@ -120,4 +120,24 @@
compatible = "arm,dsu-pmu";
cpus = <&CPU0>, <&CPU1>, <&CPU2>, <&CPU3>, <&CPU4>, <&CPU5>, <&CPU6>, <&CPU7>;
};
cs-pmu@0 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(0) 0x0 0xffc>;
};
cs-pmu@1 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(1) 0x0 0xffc>;
};
cs-pmu@2 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(2) 0x0 0xffc>;
};
cs-pmu@3 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(3) 0x0 0xffc>;
};
};

20
fdts/tc3.dts
View file

@ -58,26 +58,6 @@
kaslr-seed = <0x0 0x0>;
};
cs-pmu@0 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(0) 0x0 0xffc>;
};
cs-pmu@1 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(1) 0x0 0xffc>;
};
cs-pmu@2 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(2) 0x0 0xffc>;
};
cs-pmu@3 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(3) 0x0 0xffc>;
};
spe-pmu-mid {
status = "okay";
};

20
fdts/tc4.dts
View file

@ -71,4 +71,24 @@
dsu-pmu {
interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH 0>;
};
cs-pmu@4 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(4) 0x0 0xffc>;
};
cs-pmu@5 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(5) 0x0 0xffc>;
};
cs-pmu@6 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(6) 0x0 0xffc>;
};
cs-pmu@7 {
compatible = "arm,coresight-pmu";
reg = <0x0 MCN_PMU_ADDR(7) 0x0 0xffc>;
};
};