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PSCI: Fix MISRA defects in ON/OFF/SUSPEND/SYSTEM_OFF
Fix violations of MISRA C-2012 Rules 8.13, 10.1, 10.3, 17.7 and 20.7. Change-Id: I6f45a1069b742aebf9e1d6a403717b1522083f51 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
This commit is contained in:
Antonio Nino Diaz
parent
2bc3dba924
commit
621d64f89b
5 changed files with 76 additions and 73 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -40,14 +40,15 @@ static void psci_set_power_off_state(psci_power_state_t *state_info)
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******************************************************************************/
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int psci_do_cpu_off(unsigned int end_pwrlvl)
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{
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int rc = PSCI_E_SUCCESS, idx = plat_my_core_pos();
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int rc = PSCI_E_SUCCESS;
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int idx = (int) plat_my_core_pos();
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psci_power_state_t state_info;
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/*
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* This function must only be called on platforms where the
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* CPU_OFF platform hooks have been implemented.
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*/
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assert(psci_plat_pm_ops->pwr_domain_off);
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assert(psci_plat_pm_ops->pwr_domain_off != NULL);
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/* Construct the psci_power_state for CPU_OFF */
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psci_set_power_off_state(&state_info);
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@ -57,17 +58,16 @@ int psci_do_cpu_off(unsigned int end_pwrlvl)
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* level so that by the time all locks are taken, the system topology
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* is snapshot and state management can be done safely.
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*/
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psci_acquire_pwr_domain_locks(end_pwrlvl,
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idx);
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psci_acquire_pwr_domain_locks(end_pwrlvl, idx);
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/*
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* Call the cpu off handler registered by the Secure Payload Dispatcher
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* to let it do any bookkeeping. Assume that the SPD always reports an
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* E_DENIED error if SP refuse to power down
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*/
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if (psci_spd_pm && psci_spd_pm->svc_off) {
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if ((psci_spd_pm != NULL) && (psci_spd_pm->svc_off != NULL)) {
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rc = psci_spd_pm->svc_off(0);
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if (rc)
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if (rc != 0)
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goto exit;
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}
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@ -120,8 +120,7 @@ exit:
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* Release the locks corresponding to each power level in the
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* reverse order to which they were acquired.
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*/
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psci_release_pwr_domain_locks(end_pwrlvl,
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idx);
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psci_release_pwr_domain_locks(end_pwrlvl, idx);
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/*
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* Check if all actions needed to safely power down this cpu have
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@ -154,7 +153,7 @@ exit:
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PMF_NO_CACHE_MAINT);
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#endif
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if (psci_plat_pm_ops->pwr_domain_pwr_down_wfi) {
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if (psci_plat_pm_ops->pwr_domain_pwr_down_wfi != NULL) {
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/* This function must not return */
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psci_plat_pm_ops->pwr_domain_pwr_down_wfi(&state_info);
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} else {
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@ -55,22 +55,22 @@ static int cpu_on_validate_state(aff_info_state_t aff_state)
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* platform handler as it can return error.
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******************************************************************************/
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int psci_cpu_on_start(u_register_t target_cpu,
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entry_point_info_t *ep)
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const entry_point_info_t *ep)
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{
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int rc;
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unsigned int target_idx = plat_core_pos_by_mpidr(target_cpu);
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aff_info_state_t target_aff_state;
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int target_idx = plat_core_pos_by_mpidr(target_cpu);
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/* Calling function must supply valid input arguments */
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assert((int) target_idx >= 0);
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assert(target_idx >= 0);
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assert(ep != NULL);
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/*
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* This function must only be called on platforms where the
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* CPU_ON platform hooks have been implemented.
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*/
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assert(psci_plat_pm_ops->pwr_domain_on &&
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psci_plat_pm_ops->pwr_domain_on_finish);
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assert((psci_plat_pm_ops->pwr_domain_on != NULL) &&
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(psci_plat_pm_ops->pwr_domain_on_finish != NULL));
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/* Protect against multiple CPUs trying to turn ON the same target CPU */
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psci_spin_lock_cpu(target_idx);
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@ -91,7 +91,8 @@ int psci_cpu_on_start(u_register_t target_cpu,
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* target CPUs shutdown was not seen by the current CPU's cluster. And
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* so the cache may contain stale data for the target CPU.
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*/
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flush_cpu_data_by_index(target_idx, psci_svc_cpu_data.aff_info_state);
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flush_cpu_data_by_index((unsigned int)target_idx,
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psci_svc_cpu_data.aff_info_state);
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rc = cpu_on_validate_state(psci_get_aff_info_state_by_idx(target_idx));
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if (rc != PSCI_E_SUCCESS)
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goto exit;
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@ -101,7 +102,7 @@ int psci_cpu_on_start(u_register_t target_cpu,
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* to let it do any bookeeping. If the handler encounters an error, it's
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* expected to assert within
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*/
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if (psci_spd_pm && psci_spd_pm->svc_on)
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if ((psci_spd_pm != NULL) && (psci_spd_pm->svc_on != NULL))
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psci_spd_pm->svc_on(target_cpu);
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/*
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@ -110,7 +111,8 @@ int psci_cpu_on_start(u_register_t target_cpu,
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* turned OFF.
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*/
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psci_set_aff_info_state_by_idx(target_idx, AFF_STATE_ON_PENDING);
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flush_cpu_data_by_index(target_idx, psci_svc_cpu_data.aff_info_state);
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flush_cpu_data_by_index((unsigned int)target_idx,
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psci_svc_cpu_data.aff_info_state);
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/*
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* The cache line invalidation by the target CPU after setting the
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@ -122,9 +124,11 @@ int psci_cpu_on_start(u_register_t target_cpu,
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if (target_aff_state != AFF_STATE_ON_PENDING) {
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assert(target_aff_state == AFF_STATE_OFF);
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psci_set_aff_info_state_by_idx(target_idx, AFF_STATE_ON_PENDING);
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flush_cpu_data_by_index(target_idx, psci_svc_cpu_data.aff_info_state);
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flush_cpu_data_by_index((unsigned int)target_idx,
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psci_svc_cpu_data.aff_info_state);
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assert(psci_get_aff_info_state_by_idx(target_idx) == AFF_STATE_ON_PENDING);
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assert(psci_get_aff_info_state_by_idx(target_idx) ==
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AFF_STATE_ON_PENDING);
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}
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/*
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@ -136,15 +140,16 @@ int psci_cpu_on_start(u_register_t target_cpu,
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* steps to power on.
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*/
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rc = psci_plat_pm_ops->pwr_domain_on(target_cpu);
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assert(rc == PSCI_E_SUCCESS || rc == PSCI_E_INTERN_FAIL);
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assert((rc == PSCI_E_SUCCESS) || (rc == PSCI_E_INTERN_FAIL));
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if (rc == PSCI_E_SUCCESS)
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/* Store the re-entry information for the non-secure world. */
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cm_init_context_by_index(target_idx, ep);
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cm_init_context_by_index((unsigned int)target_idx, ep);
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else {
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/* Restore the state on error. */
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psci_set_aff_info_state_by_idx(target_idx, AFF_STATE_OFF);
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flush_cpu_data_by_index(target_idx, psci_svc_cpu_data.aff_info_state);
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flush_cpu_data_by_index((unsigned int)target_idx,
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psci_svc_cpu_data.aff_info_state);
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}
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exit:
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@ -157,8 +162,7 @@ exit:
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* are called by the common finisher routine in psci_common.c. The `state_info`
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* is the psci_power_state from which this CPU has woken up from.
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******************************************************************************/
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void psci_cpu_on_finish(unsigned int cpu_idx,
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psci_power_state_t *state_info)
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void psci_cpu_on_finish(int cpu_idx, const psci_power_state_t *state_info)
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{
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/*
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* Plat. management: Perform the platform specific actions
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@ -199,7 +203,7 @@ void psci_cpu_on_finish(unsigned int cpu_idx,
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* Dispatcher to let it do any bookeeping. If the handler encounters an
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* error, it's expected to assert within
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*/
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if (psci_spd_pm && psci_spd_pm->svc_on_finish)
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if ((psci_spd_pm != NULL) && (psci_spd_pm->svc_on_finish != NULL))
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psci_spd_pm->svc_on_finish(0);
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PUBLISH_EVENT(psci_cpu_on_finish);
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@ -295,22 +295,20 @@ void prepare_cpu_pwr_dwn(unsigned int power_level);
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/* Private exported functions from psci_on.c */
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int psci_cpu_on_start(u_register_t target_cpu,
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entry_point_info_t *ep);
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const entry_point_info_t *ep);
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void psci_cpu_on_finish(unsigned int cpu_idx,
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psci_power_state_t *state_info);
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void psci_cpu_on_finish(int cpu_idx, const psci_power_state_t *state_info);
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/* Private exported functions from psci_off.c */
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int psci_do_cpu_off(unsigned int end_pwrlvl);
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/* Private exported functions from psci_suspend.c */
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void psci_cpu_suspend_start(entry_point_info_t *ep,
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void psci_cpu_suspend_start(const entry_point_info_t *ep,
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unsigned int end_pwrlvl,
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psci_power_state_t *state_info,
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unsigned int is_power_down_state);
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void psci_cpu_suspend_finish(unsigned int cpu_idx,
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psci_power_state_t *state_info);
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void psci_cpu_suspend_finish(int cpu_idx, const psci_power_state_t *state_info);
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/* Private exported functions from psci_helpers.S */
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void psci_do_pwrdown_cache_maintenance(unsigned int pwr_level);
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@ -319,7 +317,7 @@ void psci_do_pwrup_cache_maintenance(void);
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/* Private exported functions from psci_system_off.c */
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void __dead2 psci_system_off(void);
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void __dead2 psci_system_reset(void);
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int psci_system_reset2(uint32_t reset_type, u_register_t cookie);
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u_register_t psci_system_reset2(uint32_t reset_type, u_register_t cookie);
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/* Private exported functions from psci_stat.c */
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void psci_stats_update_pwr_down(unsigned int end_pwrlvl,
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -23,7 +23,7 @@
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* This function does generic and platform specific operations after a wake-up
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* from standby/retention states at multiple power levels.
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******************************************************************************/
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static void psci_suspend_to_standby_finisher(unsigned int cpu_idx,
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static void psci_suspend_to_standby_finisher(int cpu_idx,
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unsigned int end_pwrlvl)
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{
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psci_power_state_t state_info;
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@ -64,8 +64,8 @@ static void psci_suspend_to_standby_finisher(unsigned int cpu_idx,
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* operations.
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******************************************************************************/
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static void psci_suspend_to_pwrdown_start(unsigned int end_pwrlvl,
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entry_point_info_t *ep,
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psci_power_state_t *state_info)
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const entry_point_info_t *ep,
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const psci_power_state_t *state_info)
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{
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unsigned int max_off_lvl = psci_find_max_off_lvl(state_info);
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@ -85,7 +85,7 @@ static void psci_suspend_to_pwrdown_start(unsigned int end_pwrlvl,
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* Dispatcher to let it do any book-keeping. If the handler encounters an
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* error, it's expected to assert within
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*/
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if (psci_spd_pm && psci_spd_pm->svc_suspend)
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if ((psci_spd_pm != NULL) && (psci_spd_pm->svc_suspend != NULL))
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psci_spd_pm->svc_suspend(max_off_lvl);
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#if !HW_ASSISTED_COHERENCY
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@ -95,7 +95,7 @@ static void psci_suspend_to_pwrdown_start(unsigned int end_pwrlvl,
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* HW_ASSISTED_COHERENCY = 0 platforms that can safely perform these
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* actions with data caches enabled.
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*/
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if (psci_plat_pm_ops->pwr_domain_suspend_pwrdown_early)
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if (psci_plat_pm_ops->pwr_domain_suspend_pwrdown_early != NULL)
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psci_plat_pm_ops->pwr_domain_suspend_pwrdown_early(state_info);
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#endif
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@ -147,20 +147,20 @@ static void psci_suspend_to_pwrdown_start(unsigned int end_pwrlvl,
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* the state transition has been done, no further error is expected and it is
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* not possible to undo any of the actions taken beyond that point.
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******************************************************************************/
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void psci_cpu_suspend_start(entry_point_info_t *ep,
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void psci_cpu_suspend_start(const entry_point_info_t *ep,
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unsigned int end_pwrlvl,
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psci_power_state_t *state_info,
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unsigned int is_power_down_state)
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{
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int skip_wfi = 0;
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unsigned int idx = plat_my_core_pos();
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int idx = (int) plat_my_core_pos();
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/*
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* This function must only be called on platforms where the
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* CPU_SUSPEND platform hooks have been implemented.
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*/
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assert(psci_plat_pm_ops->pwr_domain_suspend &&
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psci_plat_pm_ops->pwr_domain_suspend_finish);
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assert((psci_plat_pm_ops->pwr_domain_suspend != NULL) &&
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(psci_plat_pm_ops->pwr_domain_suspend_finish != NULL));
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/*
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* This function acquires the lock corresponding to each power
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@ -175,7 +175,7 @@ void psci_cpu_suspend_start(entry_point_info_t *ep,
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* introduced by lock contention to increase the chances of early
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* detection that a wake-up interrupt has fired.
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*/
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if (read_isr_el1()) {
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if (read_isr_el1() != 0U) {
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skip_wfi = 1;
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goto exit;
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}
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@ -192,7 +192,7 @@ void psci_cpu_suspend_start(entry_point_info_t *ep,
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psci_stats_update_pwr_down(end_pwrlvl, state_info);
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#endif
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if (is_power_down_state)
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if (is_power_down_state != 0U)
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psci_suspend_to_pwrdown_start(end_pwrlvl, ep, state_info);
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/*
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@ -214,10 +214,10 @@ exit:
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*/
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psci_release_pwr_domain_locks(end_pwrlvl,
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idx);
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if (skip_wfi)
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if (skip_wfi == 1)
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return;
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if (is_power_down_state) {
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if (is_power_down_state != 0U) {
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#if ENABLE_RUNTIME_INSTRUMENTATION
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/*
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@ -232,7 +232,7 @@ exit:
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#endif
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/* The function calls below must not return */
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if (psci_plat_pm_ops->pwr_domain_pwr_down_wfi)
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if (psci_plat_pm_ops->pwr_domain_pwr_down_wfi != NULL)
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psci_plat_pm_ops->pwr_domain_pwr_down_wfi(state_info);
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else
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psci_power_down_wfi();
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@ -269,15 +269,15 @@ exit:
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* are called by the common finisher routine in psci_common.c. The `state_info`
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* is the psci_power_state from which this CPU has woken up from.
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******************************************************************************/
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void psci_cpu_suspend_finish(unsigned int cpu_idx,
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psci_power_state_t *state_info)
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void psci_cpu_suspend_finish(int cpu_idx, const psci_power_state_t *state_info)
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{
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unsigned int counter_freq;
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unsigned int max_off_lvl;
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/* Ensure we have been woken up from a suspended state */
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assert(psci_get_aff_info_state() == AFF_STATE_ON && is_local_state_off(\
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state_info->pwr_domain_state[PSCI_CPU_PWR_LVL]));
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assert((psci_get_aff_info_state() == AFF_STATE_ON) &&
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(is_local_state_off(
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state_info->pwr_domain_state[PSCI_CPU_PWR_LVL]) != 0));
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/*
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* Plat. management: Perform the platform specific actions
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@ -302,7 +302,7 @@ void psci_cpu_suspend_finish(unsigned int cpu_idx,
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* Dispatcher to let it do any bookeeping. If the handler encounters an
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* error, it's expected to assert within
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*/
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if (psci_spd_pm && psci_spd_pm->svc_suspend_finish) {
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if ((psci_spd_pm != NULL) && (psci_spd_pm->svc_suspend_finish != NULL)) {
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max_off_lvl = psci_find_max_off_lvl(state_info);
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assert(max_off_lvl != PSCI_INVALID_PWR_LVL);
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psci_spd_pm->svc_suspend_finish(max_off_lvl);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -16,14 +16,14 @@ void __dead2 psci_system_off(void)
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{
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psci_print_power_domain_map();
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assert(psci_plat_pm_ops->system_off);
|
||||
assert(psci_plat_pm_ops->system_off != NULL);
|
||||
|
||||
/* Notify the Secure Payload Dispatcher */
|
||||
if (psci_spd_pm && psci_spd_pm->svc_system_off) {
|
||||
if ((psci_spd_pm != NULL) && (psci_spd_pm->svc_system_off != NULL)) {
|
||||
psci_spd_pm->svc_system_off();
|
||||
}
|
||||
|
||||
console_flush();
|
||||
(void) console_flush();
|
||||
|
||||
/* Call the platform specific hook */
|
||||
psci_plat_pm_ops->system_off();
|
||||
|
|
@ -35,14 +35,14 @@ void __dead2 psci_system_reset(void)
|
|||
{
|
||||
psci_print_power_domain_map();
|
||||
|
||||
assert(psci_plat_pm_ops->system_reset);
|
||||
assert(psci_plat_pm_ops->system_reset != NULL);
|
||||
|
||||
/* Notify the Secure Payload Dispatcher */
|
||||
if (psci_spd_pm && psci_spd_pm->svc_system_reset) {
|
||||
if ((psci_spd_pm != NULL) && (psci_spd_pm->svc_system_reset != NULL)) {
|
||||
psci_spd_pm->svc_system_reset();
|
||||
}
|
||||
|
||||
console_flush();
|
||||
(void) console_flush();
|
||||
|
||||
/* Call the platform specific hook */
|
||||
psci_plat_pm_ops->system_reset();
|
||||
|
|
@ -50,32 +50,34 @@ void __dead2 psci_system_reset(void)
|
|||
/* This function does not return. We should never get here */
|
||||
}
|
||||
|
||||
int psci_system_reset2(uint32_t reset_type, u_register_t cookie)
|
||||
u_register_t psci_system_reset2(uint32_t reset_type, u_register_t cookie)
|
||||
{
|
||||
int is_vendor;
|
||||
unsigned int is_vendor;
|
||||
|
||||
psci_print_power_domain_map();
|
||||
|
||||
assert(psci_plat_pm_ops->system_reset2);
|
||||
assert(psci_plat_pm_ops->system_reset2 != NULL);
|
||||
|
||||
is_vendor = (reset_type >> PSCI_RESET2_TYPE_VENDOR_SHIFT) & 1;
|
||||
if (!is_vendor) {
|
||||
is_vendor = (reset_type >> PSCI_RESET2_TYPE_VENDOR_SHIFT) & 1U;
|
||||
if (is_vendor == 0U) {
|
||||
/*
|
||||
* Only WARM_RESET is allowed for architectural type resets.
|
||||
*/
|
||||
if (reset_type != PSCI_RESET2_SYSTEM_WARM_RESET)
|
||||
return PSCI_E_INVALID_PARAMS;
|
||||
if (psci_plat_pm_ops->write_mem_protect &&
|
||||
psci_plat_pm_ops->write_mem_protect(0) < 0) {
|
||||
return PSCI_E_NOT_SUPPORTED;
|
||||
return (u_register_t) PSCI_E_INVALID_PARAMS;
|
||||
if ((psci_plat_pm_ops->write_mem_protect != NULL) &&
|
||||
(psci_plat_pm_ops->write_mem_protect(0) < 0)) {
|
||||
return (u_register_t) PSCI_E_NOT_SUPPORTED;
|
||||
}
|
||||
}
|
||||
|
||||
/* Notify the Secure Payload Dispatcher */
|
||||
if (psci_spd_pm && psci_spd_pm->svc_system_reset) {
|
||||
if ((psci_spd_pm != NULL) && (psci_spd_pm->svc_system_reset != NULL)) {
|
||||
psci_spd_pm->svc_system_reset();
|
||||
}
|
||||
console_flush();
|
||||
(void) console_flush();
|
||||
|
||||
return psci_plat_pm_ops->system_reset2(is_vendor, reset_type, cookie);
|
||||
return (u_register_t)
|
||||
psci_plat_pm_ops->system_reset2((int) is_vendor, reset_type,
|
||||
cookie);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue