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fix(st-ddr): fix coverity issue in ddrphyinit

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Address issue CID 445362 and CID 445361 found during coverity scan.

Change-Id: I1ab460d2e1353b81517788e32de662f203b0352f
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
This commit is contained in:
Maxime Méré 2024-10-10 17:08:26 +02:00
parent 79629b1a79
commit 5dd1d54477
1 changed files with 3 additions and 2 deletions

5
drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_c_initphyconfig.c
View file

@ -71,7 +71,7 @@ static void atxslewrate_program(struct stm32mp_ddr_config *config)
uint32_t anib;
uint32_t atxpren; /* Default to 0xf (max). Optimal setting is technology specific */
uint32_t atxprep; /* Default to 0xf (max). Optimal setting is technology specific */
uint32_t ck_anib_inst[2];
uint32_t ck_anib_inst[2] = {0};
atxprep = config->uia.txslewriseac;
atxpren = config->uia.txslewfallac;
@ -1012,7 +1012,6 @@ static void aforcetricont_acx4anibdis_program(struct stm32mp_ddr_config *config)
} else if (anib == 7U) {
aforcetricont = 0xFU;
}
#endif /* STM32MP_DDR3_TYPE || STM32MP_DDR4_TYPE */
/*
* If all the lanes can be disabled, and Anib is not the first or last disable
@ -1022,6 +1021,8 @@ static void aforcetricont_acx4anibdis_program(struct stm32mp_ddr_config *config)
(anib != (config->uib.numanib - 1U))) {
acx4anibdis = acx4anibdis | (0x1U << anib);
}
#endif /* STM32MP_DDR3_TYPE || STM32MP_DDR4_TYPE */
mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TANIB | c_addr |
CSR_AFORCETRICONT_ADDR))),
aforcetricont);