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fix(cpus): declare reset errata correctly

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The errata in this patch are declared as runtime, but are never called
explicitly. This means that they are never called! Convert them to reset
errata so that they are called at reset. Their SDENs entries have been
checked and confirm that this is how they should be implemented.

Also, drop the the MIDR check on the a57 erratum as it's not needed -
the erratum is already called from a cpu-specific function.

Change-Id: I22c3043ab454ce94b3c122c856e5804bc2ebb18b
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
This commit is contained in:
Boyan Karatotev 2025-01-20 14:54:35 +00:00
parent 722efeaa8c
commit 5cba510ee3
4 changed files with 13 additions and 13 deletions
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4
lib/cpus/aarch64/cortex_a57.S
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -95,7 +95,7 @@ workaround_reset_end cortex_a57, ERRATUM(814670)
check_erratum_ls cortex_a57, ERRATUM(814670), CPU_REV(0, 0)
workaround_runtime_start cortex_a57, ERRATUM(817169), ERRATA_A57_817169, CORTEX_A57_MIDR
workaround_runtime_start cortex_a57, ERRATUM(817169), ERRATA_A57_817169
/* Invalidate any TLB address */
mov x0, #0
tlbi vae3, x0

8
lib/cpus/aarch64/cortex_x3.S
View file

@ -52,9 +52,9 @@ workaround_reset_end cortex_x3, ERRATUM(2266875)
check_erratum_ls cortex_x3, ERRATUM(2266875), CPU_REV(1, 0)
workaround_runtime_start cortex_x3, ERRATUM(2302506), ERRATA_X3_2302506
workaround_reset_start cortex_x3, ERRATUM(2302506), ERRATA_X3_2302506
sysreg_bit_set CORTEX_X3_CPUACTLR2_EL1, BIT(0)
workaround_runtime_end cortex_x3, ERRATUM(2302506), NO_ISB
workaround_reset_end cortex_x3, ERRATUM(2302506)
check_erratum_ls cortex_x3, ERRATUM(2302506), CPU_REV(1, 1)
@ -84,9 +84,9 @@ workaround_reset_end cortex_x3, ERRATUM(2615812)
check_erratum_ls cortex_x3, ERRATUM(2615812), CPU_REV(1, 1)
workaround_runtime_start cortex_x3, ERRATUM(2641945), ERRATA_X3_2641945
workaround_reset_start cortex_x3, ERRATUM(2641945), ERRATA_X3_2641945
sysreg_bit_set CORTEX_X3_CPUACTLR6_EL1, BIT(41)
workaround_runtime_end cortex_x3, ERRATUM(2641945), NO_ISB
workaround_reset_end cortex_x3, ERRATUM(2641945)
check_erratum_ls cortex_x3, ERRATUM(2641945), CPU_REV(1, 0)

8
lib/cpus/aarch64/neoverse_n2.S
View file

@ -180,20 +180,20 @@ workaround_runtime_end neoverse_n2, ERRATUM(2326639)
check_erratum_ls neoverse_n2, ERRATUM(2326639), CPU_REV(0, 0)
workaround_runtime_start neoverse_n2, ERRATUM(2340933), ERRATA_N2_2340933
workaround_reset_start neoverse_n2, ERRATUM(2340933), ERRATA_N2_2340933
/* Set bit 61 in CPUACTLR5_EL1 */
sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, BIT(61)
workaround_runtime_end neoverse_n2, ERRATUM(2340933)
workaround_reset_end neoverse_n2, ERRATUM(2340933)
check_erratum_ls neoverse_n2, ERRATUM(2340933), CPU_REV(0, 0)
workaround_runtime_start neoverse_n2, ERRATUM(2346952), ERRATA_N2_2346952
workaround_reset_start neoverse_n2, ERRATUM(2346952), ERRATA_N2_2346952
/* Set TXREQ to STATIC and full L2 TQ size */
mrs x1, NEOVERSE_N2_CPUECTLR2_EL1
mov x0, #CPUECTLR2_EL1_TXREQ_STATIC_FULL
bfi x1, x0, #CPUECTLR2_EL1_TXREQ_LSB, #CPUECTLR2_EL1_TXREQ_WIDTH
msr NEOVERSE_N2_CPUECTLR2_EL1, x1
workaround_runtime_end neoverse_n2, ERRATUM(2346952)
workaround_reset_end neoverse_n2, ERRATUM(2346952)
check_erratum_ls neoverse_n2, ERRATUM(2346952), CPU_REV(0, 2)

6
lib/cpus/aarch64/neoverse_v1.S
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2024, Arm Limited. All rights reserved.
* Copyright (c) 2019-2025, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -203,10 +203,10 @@ workaround_reset_end neoverse_v1, ERRATUM(2294912)
check_erratum_ls neoverse_v1, ERRATUM(2294912), CPU_REV(1, 2)
workaround_runtime_start neoverse_v1, ERRATUM(2348377), ERRATA_V1_2348377
workaround_reset_start neoverse_v1, ERRATUM(2348377), ERRATA_V1_2348377
/* Set bit 61 in CPUACTLR5_EL1 */
sysreg_bit_set NEOVERSE_V1_ACTLR5_EL1, NEOVERSE_V1_ACTLR5_EL1_BIT_61
workaround_runtime_end neoverse_v1, ERRATUM(2348377)
workaround_reset_end neoverse_v1, ERRATUM(2348377)
check_erratum_ls neoverse_v1, ERRATUM(2348377), CPU_REV(1, 1)