From 5cb9125e9654e374dff4f322c3bbaef59511fcda Mon Sep 17 00:00:00 2001 From: Maheedhar Bollapalli Date: Thu, 23 Jan 2025 08:36:57 +0000 Subject: [PATCH] fix(versal2): update transfer list as optional Updated transfer list feature as optional and user should explicitly provide build time argument to enable transfer list. In TL optional case TL address range is utilized as default dtb address range. Updated default DT address to transfer list address. Change-Id: Ieeaacb3e6fda4ad1da9330708e19d776bffb06c1 Signed-off-by: Maheedhar Bollapalli --- plat/amd/versal2/platform.mk | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/plat/amd/versal2/platform.mk b/plat/amd/versal2/platform.mk index 3114976b6..a01604096 100644 --- a/plat/amd/versal2/platform.mk +++ b/plat/amd/versal2/platform.mk @@ -1,6 +1,6 @@ # Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved. # Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved. -# Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved. +# Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause @@ -86,8 +86,8 @@ else endif endif - -ifdef XILINX_OF_BOARD_DTB_ADDR +ifeq (${TRANSFER_LIST},0) +XILINX_OF_BOARD_DTB_ADDR ?= 0x1000000 $(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR)) endif @@ -153,7 +153,7 @@ $(eval $(call add_define, CORTEX_A78_AE_H_INC)) endif # Enable Handoff protocol using transfer lists -TRANSFER_LIST := 1 +TRANSFER_LIST ?= 0 include lib/transfer_list/transfer_list.mk BL31_SOURCES += plat/xilinx/common/plat_xfer_list.c