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refactor(cpus): convert the Cortex-A35 to use the cpu helpers

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Change-Id: Idd945cacb46cdbbcbd8309b8a2e7a94887120ff3
Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
This commit is contained in:
Sona Mathew 2023-06-19 14:49:02 -05:00
parent 40eef67e6e
commit 5c7d12cbd9
1 changed files with 4 additions and 12 deletions
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16
lib/cpus/aarch64/cortex_a35.S
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@ -16,9 +16,7 @@
* --------------------------------------------- * ---------------------------------------------
*/ */
func cortex_a35_disable_dcache func cortex_a35_disable_dcache
mrs x1, sctlr_el3 sysreg_bit_clear sctlr_el3, SCTLR_C_BIT
bic x1, x1, #SCTLR_C_BIT
msr sctlr_el3, x1
isb isb
ret ret
endfunc cortex_a35_disable_dcache endfunc cortex_a35_disable_dcache
@ -28,18 +26,14 @@ endfunc cortex_a35_disable_dcache
* --------------------------------------------- * ---------------------------------------------
*/ */
func cortex_a35_disable_smp func cortex_a35_disable_smp
mrs x0, CORTEX_A35_CPUECTLR_EL1 sysreg_bit_clear CORTEX_A35_CPUECTLR_EL1, CORTEX_A35_CPUECTLR_SMPEN_BIT
bic x0, x0, #CORTEX_A35_CPUECTLR_SMPEN_BIT
msr CORTEX_A35_CPUECTLR_EL1, x0
isb isb
dsb sy dsb sy
ret ret
endfunc cortex_a35_disable_smp endfunc cortex_a35_disable_smp
workaround_reset_start cortex_a35, ERRATUM(855472), ERRATA_A35_855472 workaround_reset_start cortex_a35, ERRATUM(855472), ERRATA_A35_855472
mrs x1, CORTEX_A35_CPUACTLR_EL1 sysreg_bit_set CORTEX_A35_CPUACTLR_EL1, CORTEX_A35_CPUACTLR_EL1_ENDCCASCI
orr x1, x1, #CORTEX_A35_CPUACTLR_EL1_ENDCCASCI
msr CORTEX_A35_CPUACTLR_EL1, x1
workaround_reset_end cortex_a35, ERRATUM(855472) workaround_reset_end cortex_a35, ERRATUM(855472)
check_erratum_ls cortex_a35, ERRATUM(855472), CPU_REV(0, 0) check_erratum_ls cortex_a35, ERRATUM(855472), CPU_REV(0, 0)
@ -53,9 +47,7 @@ cpu_reset_func_start cortex_a35
* Enable the SMP bit. * Enable the SMP bit.
* --------------------------------------------- * ---------------------------------------------
*/ */
mrs x0, CORTEX_A35_CPUECTLR_EL1 sysreg_bit_set CORTEX_A35_CPUECTLR_EL1, CORTEX_A35_CPUECTLR_SMPEN_BIT
orr x0, x0, #CORTEX_A35_CPUECTLR_SMPEN_BIT
msr CORTEX_A35_CPUECTLR_EL1, x0
cpu_reset_func_end cortex_a35 cpu_reset_func_end cortex_a35
func cortex_a35_core_pwr_dwn func cortex_a35_core_pwr_dwn