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Cortex-A57: Implement workaround for erratum 817169
Change-Id: I25f29a275ecccd7d0c9d33906e6c85967caa767a Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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4 changed files with 55 additions and 0 deletions
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@ -128,6 +128,9 @@ For Cortex-A57, the following errata build flags are defined :
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- ``ERRATA_A57_814670``: This applies errata 814670 workaround to Cortex-A57
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CPU. This needs to be enabled only for revision r0p0 of the CPU.
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- ``ERRATA_A57_817169``: This applies errata 817169 workaround to Cortex-A57
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CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
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- ``ERRATA_A57_826974``: This applies errata 826974 workaround to Cortex-A57
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CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
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@ -46,6 +46,13 @@ func cortex_a57_disable_ext_debug
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mov r0, #1
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stcopr r0, DBGOSDLR
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isb
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#if ERRATA_A57_817169
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/*
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* Invalidate any TLB address
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*/
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mov r0, #0
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stcopr r0, TLBIMVA
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#endif
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dsb sy
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bx lr
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endfunc cortex_a57_disable_ext_debug
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@ -152,6 +159,20 @@ func check_errata_814670
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b cpu_rev_var_ls
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endfunc check_errata_814670
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/* ----------------------------------------------------
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* Errata Workaround for Cortex A57 Errata #817169.
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* This applies only to revision <= r0p1 of Cortex A57.
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* ----------------------------------------------------
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*/
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func check_errata_817169
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/*
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* Even though this is only needed for revision <= r0p1, it
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* is always applied because of the low cost of the workaround.
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*/
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mov r0, #ERRATA_APPLIES
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bx lr
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endfunc check_errata_817169
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/* --------------------------------------------------------------------
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* Disable the over-read from the LDNP instruction.
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*
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@ -568,6 +589,7 @@ func cortex_a57_errata_report
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report_errata ERRATA_A57_813419, cortex_a57, 813419
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report_errata ERRATA_A57_813420, cortex_a57, 813420
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report_errata ERRATA_A57_814670, cortex_a57, 814670
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report_errata ERRATA_A57_817169, cortex_a57, 817169
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report_errata A57_DISABLE_NON_TEMPORAL_HINT, cortex_a57, \
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disable_ldnp_overread
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report_errata ERRATA_A57_826974, cortex_a57, 826974
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@ -59,6 +59,13 @@ func cortex_a57_disable_ext_debug
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mov x0, #1
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msr osdlr_el1, x0
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isb
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#if ERRATA_A57_817169
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/*
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* Invalidate any TLB address
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*/
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mov x0, #0
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tlbi vae3, x0
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#endif
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dsb sy
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ret
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endfunc cortex_a57_disable_ext_debug
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@ -160,6 +167,20 @@ func check_errata_814670
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b cpu_rev_var_ls
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endfunc check_errata_814670
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/* ----------------------------------------------------
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* Errata Workaround for Cortex A57 Errata #817169.
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* This applies only to revision <= r0p1 of Cortex A57.
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* ----------------------------------------------------
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*/
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func check_errata_817169
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/*
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* Even though this is only needed for revision <= r0p1, it
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* is always applied because of the low cost of the workaround.
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*/
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mov x0, #ERRATA_APPLIES
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ret
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endfunc check_errata_817169
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/* --------------------------------------------------------------------
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* Disable the over-read from the LDNP instruction.
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*
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@ -571,6 +592,7 @@ func cortex_a57_errata_report
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report_errata ERRATA_A57_813419, cortex_a57, 813419
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report_errata ERRATA_A57_813420, cortex_a57, 813420
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report_errata ERRATA_A57_814670, cortex_a57, 814670
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report_errata ERRATA_A57_817169, cortex_a57, 817169
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report_errata A57_DISABLE_NON_TEMPORAL_HINT, cortex_a57, \
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disable_ldnp_overread
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report_errata ERRATA_A57_826974, cortex_a57, 826974
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@ -115,6 +115,10 @@ ERRATA_A57_813420 ?=0
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# only to revision r0p0 of the Cortex A57 cpu.
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ERRATA_A57_814670 ?=0
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# Flag to apply erratum 817169 workaround during power down. This erratum
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# applies only to revision <= r0p1 of the Cortex A57 cpu.
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ERRATA_A57_817169 ?=0
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# Flag to apply erratum 826974 workaround during reset. This erratum applies
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# only to revision <= r1p1 of the Cortex A57 cpu.
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ERRATA_A57_826974 ?=0
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@ -208,6 +212,10 @@ $(eval $(call add_define,ERRATA_A57_813420))
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$(eval $(call assert_boolean,ERRATA_A57_814670))
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$(eval $(call add_define,ERRATA_A57_814670))
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# Process ERRATA_A57_817169 flag
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$(eval $(call assert_boolean,ERRATA_A57_817169))
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$(eval $(call add_define,ERRATA_A57_817169))
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# Process ERRATA_A57_826974 flag
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$(eval $(call assert_boolean,ERRATA_A57_826974))
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$(eval $(call add_define,ERRATA_A57_826974))
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