Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-08 05:43:53 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

feat(cpus): add ENABLE_ERRATA_ALL flag

Browse source 
Now that all errata flags are all conveniently in a single list we can
make sweeping decisions about their values. The first use-case is to
enable all errata in TF-A. This is useful for CI runs where it is
impractical to list every single one. This should help with the long
standing issue of errata not being built or tested.

Also add missing CPUs with errata to `ENABLE_ERRATA_ALL` to enable all
errata builds in CI.

Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I2b456d304d7bf3215c7c4f4fd70b56ecbcb09979
This commit is contained in:
Boyan Karatotev 2023-03-22 15:55:36 +00:00 • committed by Govindraj Raja
parent efff459bdb
commit 593ae35435
5 changed files with 30 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
Makefile
View file

@ -1253,6 +1253,7 @@ $(eval $(call assert_booleans,\
ENABLE_MPMM_FCONF \
FEATURE_DETECTION \
TRNG_SUPPORT \
ENABLE_ERRATA_ALL \
ERRATA_ABI_SUPPORT \
ERRATA_NON_ARM_INTERCONNECT \
CONDITIONAL_CMO \

7
docs/getting_started/build-options.rst
View file

@ -587,6 +587,11 @@ Common build options
platform hook needs to be implemented. The value is passed as the last
component of the option ``-fstack-protector-$ENABLE_STACK_PROTECTOR``.
- ``ENABLE_ERRATA_ALL``: This option is used only for testing purposes, Boolean
option to enable the workarounds for all errata that TF-A implements. Normally
they should be explicitly enabled depending on each platform's needs. Not
recommended for release builds. This option is default set to 0.
- ``ENCRYPT_BL31``: Binary flag to enable encryption of BL31 firmware. This
flag depends on ``DECRYPTION_SUPPORT`` build flag.
@ -1474,7 +1479,7 @@ Firmware update options
--------------
*Copyright (c) 2019-2024, Arm Limited. All rights reserved.*
*Copyright (c) 2019-2025, Arm Limited. All rights reserved.*
.. _DEN0115: https://developer.arm.com/docs/den0115/latest
.. _PSA FW update specification: https://developer.arm.com/documentation/den0118/latest/

4
lib/cpus/cpu-ops.mk
View file

@ -1081,7 +1081,11 @@ ifneq (${DYNAMIC_WORKAROUND_CVE_2018_3639},0)
endif
# process all flags
ifeq (${ENABLE_ERRATA_ALL},1)
$(eval $(call default_ones, $(CPU_FLAG_LIST)))
else
$(eval $(call default_zeros, $(CPU_FLAG_LIST)))
endif
$(eval $(call add_defines, $(CPU_FLAG_LIST)))
$(eval $(call assert_booleans, $(CPU_FLAG_LIST)))

6
make_helpers/defaults.mk
View file

@ -1,5 +1,5 @@
#
# Copyright (c) 2016-2024, Arm Limited. All rights reserved.
# Copyright (c) 2016-2025, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -106,6 +106,10 @@ ENABLE_STACK_PROTECTOR := 0
# Flag to enable exception handling in EL3
EL3_EXCEPTION_HANDLING := 0
# Flag to include all errata for all CPUs TF-A implements workarounds for
# Its supposed to be used only for testing.
ENABLE_ERRATA_ALL := 0
# By default BL31 encryption disabled
ENCRYPT_BL31 := 0

14
plat/arm/board/fvp/platform.mk
View file

@ -219,6 +219,20 @@ else
lib/cpus/aarch64/cortex_a75.S
endif
#Include all CPUs to build to support all-errata build.
ifeq (${ENABLE_ERRATA_ALL},1)
BUILD_CPUS_WITH_NO_FVP_MODEL = 1
FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a510.S \
lib/cpus/aarch64/cortex_a520.S \
lib/cpus/aarch64/cortex_a725.S \
lib/cpus/aarch64/cortex_x1.S \
lib/cpus/aarch64/cortex_x3.S \
lib/cpus/aarch64/cortex_x925.S \
lib/cpus/aarch64/neoverse_n3.S \
lib/cpus/aarch64/neoverse_v2.S \
lib/cpus/aarch64/neoverse_v3.S
endif
#Build AArch64-only CPUs with no FVP model yet.
ifeq (${BUILD_CPUS_WITH_NO_FVP_MODEL},1)
FVP_CPU_LIBS += lib/cpus/aarch64/neoverse_n3.S \