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coreboot: Add memory range parsing
This patch adds code to parse memory range information passed by coreboot, and a simple helper to test whether a specific address belongs to a range. This may be useful for coreboot-using platforms that need to know information about the system's memory layout (e.g. to check whether an address passed in via SMC targets valid DRAM). Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I3bea326c426db27d1a8b7d6e17418e4850e884b4
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parent
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commit
579d1e90d4
2 changed files with 53 additions and 2 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -19,6 +19,27 @@ typedef struct {
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} coreboot_serial_t;
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extern coreboot_serial_t coreboot_serial;
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#define COREBOOT_MAX_MEMRANGES 32 /* libpayload also uses this limit */
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typedef struct __packed {
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uint64_t start;
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uint64_t size;
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uint32_t type;
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} coreboot_memrange_t;
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extern coreboot_memrange_t coreboot_memranges[COREBOOT_MAX_MEMRANGES];
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typedef enum {
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CB_MEM_NONE = 0, /* coreboot will never report this */
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CB_MEM_RAM = 1,
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CB_MEM_RESERVED = 2,
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CB_MEM_ACPI = 3,
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CB_MEM_NVS = 4,
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CB_MEM_UNUSABLE = 5,
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CB_MEM_VENDOR_RSVD = 6,
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CB_MEM_TABLE = 16,
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} coreboot_memory_t;
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coreboot_memory_t coreboot_get_memory_type(uintptr_t address);
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void coreboot_table_setup(void *base);
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#endif /* COREBOOT_H */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -29,6 +29,7 @@ typedef struct {
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} cb_header_t;
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typedef enum {
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CB_TAG_MEMORY = 0x1,
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CB_TAG_SERIAL = 0xf,
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CB_TAG_CBMEM_CONSOLE = 0x17,
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} cb_tag_t;
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@ -37,11 +38,13 @@ typedef struct {
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uint32_t tag;
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uint32_t size;
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union {
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coreboot_memrange_t memranges[COREBOOT_MAX_MEMRANGES];
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coreboot_serial_t serial;
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uint64_t uint64;
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};
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} cb_entry_t;
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coreboot_memrange_t coreboot_memranges[COREBOOT_MAX_MEMRANGES];
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coreboot_serial_t coreboot_serial;
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/*
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@ -86,6 +89,23 @@ static void setup_cbmem_console(uintptr_t baseaddr)
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CONSOLE_FLAG_CRASH);
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}
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coreboot_memory_t coreboot_get_memory_type(uintptr_t address)
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{
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int i;
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for (i = 0; i < COREBOOT_MAX_MEMRANGES; i++) {
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coreboot_memrange_t *range = &coreboot_memranges[i];
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if (range->type == CB_MEM_NONE)
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break; /* end of table reached */
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if (address >= range->start &&
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address - range->start < range->size)
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return range->type;
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}
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return CB_MEM_NONE;
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}
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void coreboot_table_setup(void *base)
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{
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cb_header_t *header = base;
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@ -99,6 +119,7 @@ void coreboot_table_setup(void *base)
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ptr = base + header->header_bytes;
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for (i = 0; i < header->table_entries; i++) {
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size_t size;
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cb_entry_t *entry = ptr;
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if (ptr - base >= header->header_bytes + header->table_bytes) {
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@ -107,6 +128,15 @@ void coreboot_table_setup(void *base)
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}
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switch (read_le32(&entry->tag)) {
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case CB_TAG_MEMORY:
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size = read_le32(&entry->size) -
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offsetof(cb_entry_t, memranges);
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if (size > sizeof(coreboot_memranges)) {
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ERROR("Need to truncate coreboot memranges!\n");
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size = sizeof(coreboot_memranges);
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}
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memcpy(&coreboot_memranges, &entry->memranges, size);
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break;
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case CB_TAG_SERIAL:
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memcpy(&coreboot_serial, &entry->serial,
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sizeof(coreboot_serial));
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