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doc: Remove per-page contents lists
These are no longer needed as there will always be a table of contents rendered to the left of every page. Some of these lists can be quite long and, when opening a page, the reader sees nothing but a huge list of contents! After this patch, the document contents are front-and-centre and the contents are nicely rendered in the sidebar without duplication. Change-Id: I444754d548ec91d00f2b04e861de8dde8856aa62 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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Paul Beesley
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26 changed files with 4 additions and 79 deletions
docs
change-log.rst
components
exception-handling.rstfirmware-update.rstplatform-interrupt-controller-API.rstras.rstromlib-design.rstsdei.rstsecure-partition-manager-design.rstxlat-tables-lib-v2-design.rst
design
auth-framework.rstcpu-specific-build-macros.rstfirmware-design.rstinterrupt-framework-design.rstpsci-pd-tree.rstreset-design.rsttrusted-board-boot.rst
getting_started
image-terminology.rstporting-guide.rstpsci-lib-integration-guide.rstrt-svc-writers-guide.rstuser-guide.rst
index.rstplat
process
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@ -4,8 +4,6 @@ Change Log & Release Notes
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This document contains a summary of the new features, changes, fixes and known
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issues in each release of Trusted Firmware-A.
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.. contents::
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Version 2.1
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-----------
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@ -1,9 +1,6 @@
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Exception Handling Framework
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============================
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.. contents::
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:depth: 2
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.. |EHF| replace:: Exception Handling Framework
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.. |TF-A| replace:: Trusted Firmware-A
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@ -1,10 +1,6 @@
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Firmware Update (FWU)
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=====================
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.. contents::
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--------------
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Introduction
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------------
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@ -1,8 +1,6 @@
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Platform Interrupt Controller API
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=================================
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.. contents::
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This document lists the optional platform interrupt controller API that
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abstracts the runtime configuration and control of interrupt controller from the
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generic code. The mandatory APIs are described in the `porting guide`__.
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@ -1,9 +1,6 @@
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Reliability, Availability, and Serviceability (RAS) Extensions
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==============================================================
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.. contents::
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:depth: 2
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.. |EHF| replace:: Exception Handling Framework
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.. |TF-A| replace:: Trusted Firmware-A
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@ -1,8 +1,6 @@
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Library at ROM
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==============
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.. contents::
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This document provides an overview of the "library at ROM" implementation in
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Trusted Firmware-A (TF-A).
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@ -1,9 +1,6 @@
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SDEI: Software Delegated Exception Interface
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============================================
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.. contents::
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:depth: 2
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This document provides an overview of the SDEI dispatcher implementation in
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Trusted Firmware-A (TF-A).
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@ -1,8 +1,6 @@
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Secure Partition Manager
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************************
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.. contents::
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Background
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==========
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@ -1,9 +1,6 @@
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Translation (XLAT) Tables Library
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=================================
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.. contents::
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This document describes the design of the translation tables library (version 2)
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used by Trusted Firmware-A (TF-A). This library provides APIs to create page
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tables based on a description of the memory layout, as well as setting up system
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@ -1,8 +1,6 @@
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Authentication Framework & Chain of Trust
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=========================================
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.. contents::
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The aim of this document is to describe the authentication framework
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implemented in Trusted Firmware-A (TF-A). This framework fulfills the
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following requirements:
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@ -1,11 +1,6 @@
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Arm CPU Specific Build Macros
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=============================
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.. contents::
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This document describes the various build options present in the CPU specific
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operations framework to enable errata workarounds and to enable optimizations
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for a specific CPU on a platform.
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@ -1,8 +1,6 @@
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Firmware Design
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===============
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.. contents::
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Trusted Firmware-A (TF-A) implements a subset of the Trusted Board Boot
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Requirements (TBBR) Platform Design Document (PDD) [1]_ for Arm reference
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platforms. The TBB sequence starts when the platform is powered on and runs up
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@ -1,8 +1,6 @@
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Interrupt Management Framework
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==============================
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.. contents::
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This framework is responsible for managing interrupts routed to EL3. It also
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allows EL3 software to configure the interrupt routing behavior. Its main
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objective is to implement the following two requirements.
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@ -1,10 +1,6 @@
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PSCI Power Domain Tree Structure
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================================
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.. contents::
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--------------
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Requirements
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------------
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@ -1,11 +1,6 @@
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CPU Reset
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=========
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.. contents::
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This document describes the high-level design of the framework to handle CPU
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resets in Trusted Firmware-A (TF-A). It also describes how the platform
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integrator can tailor this code to the system configuration to some extent,
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@ -1,11 +1,6 @@
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Trusted Board Boot
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==================
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.. contents::
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The Trusted Board Boot (TBB) feature prevents malicious firmware from running on
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the platform by authenticating all firmware images up to and including the
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normal world bootloader. It does this by establishing a Chain of Trust using
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@ -1,8 +1,6 @@
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Image Terminology
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=================
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.. contents::
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This page contains the current name, abbreviated name and purpose of the various
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images referred to in the Trusted Firmware project.
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@ -1,8 +1,6 @@
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Porting Guide
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=============
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.. contents::
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Introduction
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------------
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PSCI Library Integration guide for Armv8-A AArch32 systems
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==========================================================
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.. contents::
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This document describes the PSCI library interface with a focus on how to
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integrate with a suitable Trusted OS for an Armv8-A AArch32 system. The PSCI
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Library implements the PSCI Standard as described in `PSCI spec`_ and is meant
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@ -1,10 +1,6 @@
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EL3 Runtime Service Writer's Guide
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=====================================================
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.. contents::
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Introduction
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------------
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User Guide
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==========
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.. contents::
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This document describes how to build Trusted Firmware-A (TF-A) and run it with a
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tested set of other software components using defined configurations on the Juno
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Arm development platform and Arm Fixed Virtual Platform (FVP) models. It is
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@ -3,7 +3,7 @@ Trusted Firmware-A Documentation
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.. toctree::
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:maxdepth: 1
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:caption: Contents
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:hidden:
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Home<self>
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getting_started/index
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@ -18,6 +18,9 @@ Trusted Firmware-A Documentation
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maintainers
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license
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.. contents:: On This Page
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:depth: 3
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Trusted Firmware-A (TF-A) provides a reference implementation of secure world
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software for `Armv7-A and Armv8-A`_, including a `Secure Monitor`_ executing
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at Exception Level 3 (EL3). It implements various Arm interface standards,
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@ -1,8 +1,6 @@
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Raspberry Pi 3
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==============
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.. contents::
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The `Raspberry Pi 3`_ is an inexpensive single-board computer that contains four
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Arm Cortex-A53 cores.
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@ -1,8 +1,6 @@
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Coding Style & Guidelines
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=========================
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.. contents::
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The following sections contain TF coding guidelines. They are continually
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evolving and should not be considered "set in stone". Feel free to question them
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and provide feedback.
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Platform Compatibility Policy
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=============================
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.. contents::
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--------------
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Introduction
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------------
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Release Processes
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=================
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.. contents::
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--------------
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Project Release Cadence
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-----------------------
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