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https://github.com/ARM-software/arm-trusted-firmware.git
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Merge "refactor(cm): move mpam registers into el2 context" into integration
This commit is contained in:
Manish Pandey
TrustedFirmware Code Review
commit
55c7efc494
3 changed files with 53 additions and 79 deletions
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@ -298,27 +298,6 @@
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#define CTX_PAUTH_REGS_END U(0)
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#endif /* CTX_INCLUDE_PAUTH_REGS */
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/*******************************************************************************
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* Registers related to ARMv8.2-MPAM.
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******************************************************************************/
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#define CTX_MPAM_REGS_OFFSET (CTX_PAUTH_REGS_OFFSET + CTX_PAUTH_REGS_END)
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#if CTX_INCLUDE_MPAM_REGS
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#define CTX_MPAM2_EL2 U(0x0)
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#define CTX_MPAMHCR_EL2 U(0x8)
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#define CTX_MPAMVPM0_EL2 U(0x10)
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#define CTX_MPAMVPM1_EL2 U(0x18)
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#define CTX_MPAMVPM2_EL2 U(0x20)
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#define CTX_MPAMVPM3_EL2 U(0x28)
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#define CTX_MPAMVPM4_EL2 U(0x30)
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#define CTX_MPAMVPM5_EL2 U(0x38)
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#define CTX_MPAMVPM6_EL2 U(0x40)
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#define CTX_MPAMVPM7_EL2 U(0x48)
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#define CTX_MPAMVPMV_EL2 U(0x50)
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#define CTX_MPAM_REGS_END U(0x60)
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#else
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#define CTX_MPAM_REGS_END U(0x0)
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#endif /* CTX_INCLUDE_MPAM_REGS */
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/*******************************************************************************
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* Registers initialised in a per-world context.
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******************************************************************************/
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@ -355,9 +334,6 @@
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#if CTX_INCLUDE_PAUTH_REGS
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# define CTX_PAUTH_REGS_ALL (CTX_PAUTH_REGS_END >> DWORD_SHIFT)
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#endif
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#if CTX_INCLUDE_MPAM_REGS
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# define CTX_MPAM_REGS_ALL (CTX_MPAM_REGS_END >> DWORD_SHIFT)
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#endif
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/*
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* AArch64 general purpose register context structure. Usually x0-x18,
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@ -397,11 +373,6 @@ DEFINE_REG_STRUCT(cve_2018_3639, CTX_CVE_2018_3639_ALL);
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DEFINE_REG_STRUCT(pauth, CTX_PAUTH_REGS_ALL);
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#endif
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/* Registers associated to ARMv8.2 MPAM */
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#if CTX_INCLUDE_MPAM_REGS
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DEFINE_REG_STRUCT(mpam, CTX_MPAM_REGS_ALL);
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#endif
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/*
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* Macros to access members of any of the above structures using their
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* offsets
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@ -432,10 +403,6 @@ typedef struct cpu_context {
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pauth_t pauth_ctx;
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#endif
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#if CTX_INCLUDE_MPAM_REGS
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mpam_t mpam_ctx;
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#endif
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#if CTX_INCLUDE_EL2_REGS
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el2_sysregs_t el2_sysregs_ctx;
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#endif
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@ -468,9 +435,6 @@ extern per_world_context_t per_world_context[CPU_DATA_CONTEXT_NUM];
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#if CTX_INCLUDE_PAUTH_REGS
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# define get_pauth_ctx(h) (&((cpu_context_t *) h)->pauth_ctx)
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#endif
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#if CTX_INCLUDE_MPAM_REGS
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# define get_mpam_ctx(h) (&((cpu_context_t *) h)->mpam_ctx)
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#endif
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/*
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* Compile time assertions related to the 'cpu_context' structure to
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@ -499,11 +463,6 @@ CASSERT(CTX_PAUTH_REGS_OFFSET == __builtin_offsetof(cpu_context_t, pauth_ctx),
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assert_core_context_pauth_offset_mismatch);
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#endif /* CTX_INCLUDE_PAUTH_REGS */
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#if CTX_INCLUDE_MPAM_REGS
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CASSERT(CTX_MPAM_REGS_OFFSET == __builtin_offsetof(cpu_context_t, mpam_ctx),
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assert_core_context_mpam_offset_mismatch);
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#endif /* CTX_INCLUDE_MPAM_REGS */
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/*
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* Helper macro to set the general purpose registers that correspond to
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* parameters in an aapcs_64 call i.e. x0-x7
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@ -114,6 +114,20 @@ typedef struct el2_gcs_regs {
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uint64_t gcspr_el2;
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} el2_gcs_regs_t;
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typedef struct el2_mpam_regs {
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uint64_t mpam2_el2;
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uint64_t mpamhcr_el2;
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uint64_t mpamvpm0_el2;
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uint64_t mpamvpm1_el2;
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uint64_t mpamvpm2_el2;
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uint64_t mpamvpm3_el2;
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uint64_t mpamvpm4_el2;
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uint64_t mpamvpm5_el2;
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uint64_t mpamvpm6_el2;
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uint64_t mpamvpm7_el2;
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uint64_t mpamvpmv_el2;
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} el2_mpam_regs_t;
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typedef struct el2_sysregs {
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el2_common_regs_t common;
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@ -174,6 +188,10 @@ typedef struct el2_sysregs {
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el2_gcs_regs_t gcs;
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#endif
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#if CTX_INCLUDE_MPAM_REGS
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el2_mpam_regs_t mpam;
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#endif
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} el2_sysregs_t;
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/*
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@ -311,6 +329,15 @@ typedef struct el2_sysregs {
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#define write_el2_ctx_gcs(ctx, reg, val)
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#endif /* ENABLE_FEAT_GCS */
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#if CTX_INCLUDE_MPAM_REGS
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#define read_el2_ctx_mpam(ctx, reg) (((ctx)->mpam).reg)
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#define write_el2_ctx_mpam(ctx, reg, val) ((((ctx)->mpam).reg) \
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= (uint64_t) (val))
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#else
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#define read_el2_ctx_mpam(ctx, reg) ULL(0)
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#define write_el2_ctx_mpam(ctx, reg, val)
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#endif /* CTX_INCLUDE_MPAM_REGS */
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#endif /* CTX_INCLUDE_EL2_REGS */
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/******************************************************************************/
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@ -1046,13 +1046,11 @@ static void el2_sysregs_context_restore_fgt(el2_sysregs_t *ctx)
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write_hfgwtr_el2(read_el2_ctx_fgt(ctx, hfgwtr_el2));
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}
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#if CTX_INCLUDE_MPAM_REGS
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static void el2_sysregs_context_save_mpam(mpam_t *ctx)
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static void el2_sysregs_context_save_mpam(el2_sysregs_t *ctx)
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{
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u_register_t mpam_idr = read_mpamidr_el1();
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write_ctx_reg(ctx, CTX_MPAM2_EL2, read_mpam2_el2());
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write_el2_ctx_mpam(ctx, mpam2_el2, read_mpam2_el2());
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/*
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* The context registers that we intend to save would be part of the
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@ -1066,9 +1064,9 @@ static void el2_sysregs_context_save_mpam(mpam_t *ctx)
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* MPAMHCR_EL2, MPAMVPMV_EL2 and MPAMVPM0_EL2 are always present if
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* MPAMIDR_HAS_HCR_BIT == 1.
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*/
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write_ctx_reg(ctx, CTX_MPAMHCR_EL2, read_mpamhcr_el2());
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write_ctx_reg(ctx, CTX_MPAMVPM0_EL2, read_mpamvpm0_el2());
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write_ctx_reg(ctx, CTX_MPAMVPMV_EL2, read_mpamvpmv_el2());
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write_el2_ctx_mpam(ctx, mpamhcr_el2, read_mpamhcr_el2());
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write_el2_ctx_mpam(ctx, mpamvpm0_el2, read_mpamvpm0_el2());
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write_el2_ctx_mpam(ctx, mpamvpmv_el2, read_mpamvpmv_el2());
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/*
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* The number of MPAMVPM registers is implementation defined, their
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@ -1076,71 +1074,67 @@ static void el2_sysregs_context_save_mpam(mpam_t *ctx)
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*/
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switch ((mpam_idr >> MPAMIDR_EL1_VPMR_MAX_SHIFT) & MPAMIDR_EL1_VPMR_MAX_MASK) {
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case 7:
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write_ctx_reg(ctx, CTX_MPAMVPM7_EL2, read_mpamvpm7_el2());
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write_el2_ctx_mpam(ctx, mpamvpm7_el2, read_mpamvpm7_el2());
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__fallthrough;
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case 6:
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write_ctx_reg(ctx, CTX_MPAMVPM6_EL2, read_mpamvpm6_el2());
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write_el2_ctx_mpam(ctx, mpamvpm6_el2, read_mpamvpm6_el2());
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__fallthrough;
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case 5:
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write_ctx_reg(ctx, CTX_MPAMVPM5_EL2, read_mpamvpm5_el2());
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write_el2_ctx_mpam(ctx, mpamvpm5_el2, read_mpamvpm5_el2());
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__fallthrough;
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case 4:
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write_ctx_reg(ctx, CTX_MPAMVPM4_EL2, read_mpamvpm4_el2());
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write_el2_ctx_mpam(ctx, mpamvpm4_el2, read_mpamvpm4_el2());
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__fallthrough;
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case 3:
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write_ctx_reg(ctx, CTX_MPAMVPM3_EL2, read_mpamvpm3_el2());
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write_el2_ctx_mpam(ctx, mpamvpm3_el2, read_mpamvpm3_el2());
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__fallthrough;
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case 2:
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write_ctx_reg(ctx, CTX_MPAMVPM2_EL2, read_mpamvpm2_el2());
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write_el2_ctx_mpam(ctx, mpamvpm2_el2, read_mpamvpm2_el2());
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__fallthrough;
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case 1:
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write_ctx_reg(ctx, CTX_MPAMVPM1_EL2, read_mpamvpm1_el2());
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write_el2_ctx_mpam(ctx, mpamvpm1_el2, read_mpamvpm1_el2());
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break;
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}
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}
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#endif /* CTX_INCLUDE_MPAM_REGS */
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#if CTX_INCLUDE_MPAM_REGS
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static void el2_sysregs_context_restore_mpam(mpam_t *ctx)
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static void el2_sysregs_context_restore_mpam(el2_sysregs_t *ctx)
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{
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u_register_t mpam_idr = read_mpamidr_el1();
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write_mpam2_el2(read_ctx_reg(ctx, CTX_MPAM2_EL2));
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write_mpam2_el2(read_el2_ctx_mpam(ctx, mpam2_el2));
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if ((mpam_idr & MPAMIDR_HAS_HCR_BIT) == 0U) {
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return;
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}
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write_mpamhcr_el2(read_ctx_reg(ctx, CTX_MPAMHCR_EL2));
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write_mpamvpm0_el2(read_ctx_reg(ctx, CTX_MPAMVPM0_EL2));
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write_mpamvpmv_el2(read_ctx_reg(ctx, CTX_MPAMVPMV_EL2));
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write_mpamhcr_el2(read_el2_ctx_mpam(ctx, mpamhcr_el2));
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write_mpamvpm0_el2(read_el2_ctx_mpam(ctx, mpamvpm0_el2));
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write_mpamvpmv_el2(read_el2_ctx_mpam(ctx, mpamvpmv_el2));
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switch ((mpam_idr >> MPAMIDR_EL1_VPMR_MAX_SHIFT) & MPAMIDR_EL1_VPMR_MAX_MASK) {
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case 7:
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write_mpamvpm7_el2(read_ctx_reg(ctx, CTX_MPAMVPM7_EL2));
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write_mpamvpm7_el2(read_el2_ctx_mpam(ctx, mpamvpm7_el2));
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__fallthrough;
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case 6:
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write_mpamvpm6_el2(read_ctx_reg(ctx, CTX_MPAMVPM6_EL2));
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write_mpamvpm6_el2(read_el2_ctx_mpam(ctx, mpamvpm6_el2));
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__fallthrough;
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case 5:
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write_mpamvpm5_el2(read_ctx_reg(ctx, CTX_MPAMVPM5_EL2));
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write_mpamvpm5_el2(read_el2_ctx_mpam(ctx, mpamvpm5_el2));
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__fallthrough;
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case 4:
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write_mpamvpm4_el2(read_ctx_reg(ctx, CTX_MPAMVPM4_EL2));
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write_mpamvpm4_el2(read_el2_ctx_mpam(ctx, mpamvpm4_el2));
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__fallthrough;
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case 3:
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write_mpamvpm3_el2(read_ctx_reg(ctx, CTX_MPAMVPM3_EL2));
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write_mpamvpm3_el2(read_el2_ctx_mpam(ctx, mpamvpm3_el2));
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__fallthrough;
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case 2:
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write_mpamvpm2_el2(read_ctx_reg(ctx, CTX_MPAMVPM2_EL2));
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write_mpamvpm2_el2(read_el2_ctx_mpam(ctx, mpamvpm2_el2));
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__fallthrough;
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case 1:
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write_mpamvpm1_el2(read_ctx_reg(ctx, CTX_MPAMVPM1_EL2));
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write_mpamvpm1_el2(read_el2_ctx_mpam(ctx, mpamvpm1_el2));
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break;
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}
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}
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#endif /* CTX_INCLUDE_MPAM_REGS */
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/* ---------------------------------------------------------------------------
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* The following registers are not added:
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@ -1283,12 +1277,9 @@ void cm_el2_sysregs_context_save(uint32_t security_state)
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write_el2_ctx_mte2(el2_sysregs_ctx, tfsr_el2, read_tfsr_el2());
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}
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#if CTX_INCLUDE_MPAM_REGS
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if (is_feat_mpam_supported()) {
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mpam_t *mpam_ctx = get_mpam_ctx(ctx);
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el2_sysregs_context_save_mpam(mpam_ctx);
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el2_sysregs_context_save_mpam(el2_sysregs_ctx);
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}
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#endif
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if (is_feat_fgt_supported()) {
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el2_sysregs_context_save_fgt(el2_sysregs_ctx);
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@ -1369,12 +1360,9 @@ void cm_el2_sysregs_context_restore(uint32_t security_state)
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write_tfsr_el2(read_el2_ctx_mte2(el2_sysregs_ctx, tfsr_el2));
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}
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#if CTX_INCLUDE_MPAM_REGS
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if (is_feat_mpam_supported()) {
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mpam_t *mpam_ctx = get_mpam_ctx(ctx);
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el2_sysregs_context_restore_mpam(mpam_ctx);
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el2_sysregs_context_restore_mpam(el2_sysregs_ctx);
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}
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#endif
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if (is_feat_fgt_supported()) {
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el2_sysregs_context_restore_fgt(el2_sysregs_ctx);
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