Merge "feat(fvp): add flash areas for secure partition" into integration

This commit is contained in:
Manish Pandey 2024-07-29 15:11:27 +02:00 committed by TrustedFirmware Code Review
commit 5477fb37e6
3 changed files with 30 additions and 11 deletions

View file

@ -17,6 +17,7 @@
/* V2M motherboard system registers & offsets */ /* V2M motherboard system registers & offsets */
#define V2M_SYSREGS_BASE UL(0x1c010000) #define V2M_SYSREGS_BASE UL(0x1c010000)
#define V2M_SYSREGS_SIZE UL(0x00010000)
#define V2M_SYS_ID UL(0x0) #define V2M_SYS_ID UL(0x0)
#define V2M_SYS_SWITCH UL(0x4) #define V2M_SYS_SWITCH UL(0x4)
#define V2M_SYS_LED UL(0x8) #define V2M_SYS_LED UL(0x8)
@ -78,6 +79,8 @@
/* NOR Flash */ /* NOR Flash */
#define V2M_FLASH0_BASE (V2M_OFFSET + UL(0x08000000)) #define V2M_FLASH0_BASE (V2M_OFFSET + UL(0x08000000))
#define V2M_FLASH0_SIZE UL(0x04000000) #define V2M_FLASH0_SIZE UL(0x04000000)
#define V2M_FLASH1_BASE (V2M_OFFSET + UL(0x0c000000))
#define V2M_FLASH1_SIZE UL(0x04000000)
#define V2M_FLASH_BLOCK_SIZE UL(0x00040000) /* 256 KB */ #define V2M_FLASH_BLOCK_SIZE UL(0x00040000) /* 256 KB */
#define V2M_IOFPGA_BASE (V2M_OFFSET + UL(0x1c000000)) #define V2M_IOFPGA_BASE (V2M_OFFSET + UL(0x1c000000))
@ -126,6 +129,14 @@
V2M_FLASH0_SIZE, \ V2M_FLASH0_SIZE, \
MT_RO_DATA | MT_SECURE) MT_RO_DATA | MT_SECURE)
#define V2M_MAP_FLASH1_RW MAP_REGION_FLAT(V2M_FLASH1_BASE,\
V2M_FLASH1_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE)
#define V2M_MAP_FLASH1_RO MAP_REGION_FLAT(V2M_FLASH1_BASE,\
V2M_FLASH1_SIZE, \
MT_RO_DATA | MT_SECURE)
#define V2M_MAP_IOFPGA MAP_REGION_FLAT(V2M_IOFPGA_BASE,\ #define V2M_MAP_IOFPGA MAP_REGION_FLAT(V2M_IOFPGA_BASE,\
V2M_IOFPGA_SIZE, \ V2M_IOFPGA_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE) MT_DEVICE | MT_RW | MT_SECURE)
@ -136,5 +147,19 @@
V2M_IOFPGA_SIZE, \ V2M_IOFPGA_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE | MT_USER) MT_DEVICE | MT_RW | MT_SECURE | MT_USER)
#define V2M_MAP_SECURE_SYSTEMREG_EL0 MAP_REGION_FLAT( \
V2M_SYSREGS_BASE, \
V2M_SYSREGS_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE | MT_USER)
#define V2M_MAP_FLASH0_RW_EL0 MAP_REGION_FLAT( \
V2M_FLASH0_BASE, \
V2M_FLASH0_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE | MT_USER)
#define V2M_MAP_FLASH1_RW_EL0 MAP_REGION_FLAT( \
V2M_FLASH1_BASE, \
V2M_FLASH1_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE | MT_USER)
#endif /* V2M_DEF_H */ #endif /* V2M_DEF_H */

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@ -219,6 +219,11 @@ const mmap_region_t plat_arm_mmap[] = {
#if defined(IMAGE_BL31) && SPM_MM #if defined(IMAGE_BL31) && SPM_MM
const mmap_region_t plat_arm_secure_partition_mmap[] = { const mmap_region_t plat_arm_secure_partition_mmap[] = {
V2M_MAP_IOFPGA_EL0, /* for the UART */ V2M_MAP_IOFPGA_EL0, /* for the UART */
V2M_MAP_SECURE_SYSTEMREG_EL0, /* for initializing flash */
#if PSA_FWU_SUPPORT
V2M_MAP_FLASH0_RW_EL0, /* for firmware update service in standalone mm */
#endif
V2M_MAP_FLASH1_RW_EL0, /* for secure variable service in standalone mm */
MAP_REGION_FLAT(DEVICE0_BASE, MAP_REGION_FLAT(DEVICE0_BASE,
DEVICE0_SIZE, DEVICE0_SIZE,
MT_DEVICE | MT_RO | MT_SECURE | MT_USER), MT_DEVICE | MT_RO | MT_SECURE | MT_USER),

View file

@ -70,15 +70,4 @@
#define FVP_VE_IRQ_TZ_WDOG 56 #define FVP_VE_IRQ_TZ_WDOG 56
#define FVP_VE_IRQ_SEC_SYS_TIMER 57 #define FVP_VE_IRQ_SEC_SYS_TIMER 57
#define V2M_FLASH1_BASE UL(0x0C000000)
#define V2M_FLASH1_SIZE UL(0x04000000)
#define V2M_MAP_FLASH1_RW MAP_REGION_FLAT(V2M_FLASH1_BASE,\
V2M_FLASH1_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE)
#define V2M_MAP_FLASH1_RO MAP_REGION_FLAT(V2M_FLASH1_BASE,\
V2M_FLASH1_SIZE, \
MT_RO_DATA | MT_SECURE)
#endif /* FVP_VE_DEF_H */ #endif /* FVP_VE_DEF_H */