qemu: Fix interrupt type check

Function plat_ic_get_pending_interrupt_type() should return interrupt
type, not id. The function is used in aarch64 exception handling and
currently the irq/fiq forwarding fails if a secure interrupt happens while
running normal world.

The qemu-specific gic file does not contain any extra functionality so it
can be removed and common file can be used instead.

fixes arm-software/tf-issues#546

Signed-off-by: Santeri Salko <santeri.salko@gmail.com>

plat/common/plat_gicv2.c

@@ -134,6 +134,8 @@ uint32_t plat_interrupt_type_to_line(uint32_t type,
 		       type == INTR_TYPE_EL3 ||
 		       type == INTR_TYPE_NS);
 
+	assert(sec_state_is_valid(security_state));
+
 	/* Non-secure interrupts are signaled on the IRQ line always */
 	if (type == INTR_TYPE_NS)
 		return __builtin_ctz(SCR_IRQ_BIT);

plat/qemu/platform.mk

@@ -150,12 +150,12 @@ BL31_SOURCES		+=	lib/cpus/aarch64/aem_generic.S		\
 				drivers/arm/gic/v2/gicv2_helpers.c	\
 				drivers/arm/gic/v2/gicv2_main.c		\
 				drivers/arm/gic/common/gic_common.c	\
+				plat/common/plat_gicv2.c		\
 				plat/common/plat_psci_common.c		\
 				plat/qemu/qemu_pm.c			\
 				plat/qemu/topology.c			\
 				plat/qemu/aarch64/plat_helpers.S	\
-				plat/qemu/qemu_bl31_setup.c		\
+				plat/qemu/qemu_bl31_setup.c
-				plat/qemu/qemu_gic.c
 endif
 
 # Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images

plat/qemu/qemu_gic.c

@@ -1,68 +0,0 @@
-/*
- * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <assert.h>
-#include <bl_common.h>
-#include <gicv2.h>
-#include <interrupt_mgmt.h>
-
-uint32_t plat_ic_get_pending_interrupt_id(void)
-{
-	return gicv2_get_pending_interrupt_id();
-}
-
-uint32_t plat_ic_get_pending_interrupt_type(void)
-{
-	return gicv2_get_pending_interrupt_type();
-}
-
-uint32_t plat_ic_acknowledge_interrupt(void)
-{
-	return gicv2_acknowledge_interrupt();
-}
-
-uint32_t plat_ic_get_interrupt_type(uint32_t id)
-{
-	uint32_t group;
-
-	group = gicv2_get_interrupt_group(id);
-
-	/* Assume that all secure interrupts are S-EL1 interrupts */
-	if (!group)
-		return INTR_TYPE_S_EL1;
-	else
-		return INTR_TYPE_NS;
-
-}
-
-void plat_ic_end_of_interrupt(uint32_t id)
-{
-	gicv2_end_of_interrupt(id);
-}
-
-uint32_t plat_interrupt_type_to_line(uint32_t type,
-				uint32_t security_state)
-{
-	assert(type == INTR_TYPE_S_EL1 ||
-	       type == INTR_TYPE_EL3 ||
-	       type == INTR_TYPE_NS);
-
-	assert(sec_state_is_valid(security_state));
-
-	/* Non-secure interrupts are signalled on the IRQ line always */
-	if (type == INTR_TYPE_NS)
-		return __builtin_ctz(SCR_IRQ_BIT);
-
-	/*
-	 * Secure interrupts are signalled using the IRQ line if the FIQ_EN
-	 * bit is not set else they are signalled using the FIQ line.
-	 */
-	if (gicv2_is_fiq_enabled())
-		return __builtin_ctz(SCR_FIQ_BIT);
-	else
-		return __builtin_ctz(SCR_IRQ_BIT);
-}
-

plat/qemu/sp_min/sp_min-qemu.mk

@@ -6,7 +6,6 @@
 
 BL32_SOURCES		+=	plat/qemu/sp_min/sp_min_setup.c		\
 				plat/qemu/aarch32/plat_helpers.S	\
-				plat/qemu/qemu_gic.c 			\
 				plat/qemu/qemu_pm.c			\
 				plat/qemu/topology.c
 
@@ -14,7 +13,8 @@ BL32_SOURCES		+=	lib/cpus/aarch32/aem_generic.S		\
 				lib/cpus/aarch32/cortex_a15.S
 
 BL32_SOURCES		+=	plat/common/aarch32/platform_mp_stack.S \
-				plat/common/plat_psci_common.c
+				plat/common/plat_psci_common.c \
+				plat/common/plat_gicv2.c
 
 
 BL32_SOURCES		+=	drivers/arm/gic/v2/gicv2_helpers.c	\