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drivers: ti: uart: Add TI specific 16550 initialization
On TI platforms the UART is disabled by default and must be explicitly enabled using the MDR1 register. NOTE: The original definition of http://www.ti.com/lit/ds/symlink/pc16550d.pdf has no MDR register, but many TI SoCs implementing 16550 do have a quirky MDR register implemented. So, this should be enabled with TI_16550_MDR_QUIRK NOTE: In such implementation, the CSR register does not exist. Signed-off-by: Benjamin Fair <b-fair@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
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2 changed files with 6 additions and 0 deletions
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@ -66,6 +66,10 @@ func console_16550_core_init
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/* no interrupt */
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/* no interrupt */
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mov w3, #0
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mov w3, #0
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str w3, [x0, #UARTIER]
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str w3, [x0, #UARTIER]
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#ifdef TI_16550_MDR_QUIRK
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/* UART must be enabled on some platforms via the MDR register */
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str w3, [x0, #UARTMDR1]
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#endif /* TI_16550_MDR_QUIRK */
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/* enable fifo, DMA */
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/* enable fifo, DMA */
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mov w3, #(UARTFCR_FIFOEN | UARTFCR_DMAEN)
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mov w3, #(UARTFCR_FIFOEN | UARTFCR_DMAEN)
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str w3, [x0, #UARTFCR]
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str w3, [x0, #UARTFCR]
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@ -23,6 +23,8 @@
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#define UARTMSR 0x18
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#define UARTMSR 0x18
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#define UARTSPR 0x1c
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#define UARTSPR 0x1c
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#define UARTCSR 0x20
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#define UARTCSR 0x20
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/* Some instances have MDR1 defined as well */
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#define UARTMDR1 0x20
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#define UARTRXFIFOCFG 0x24
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#define UARTRXFIFOCFG 0x24
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#define UARTMIE 0x28
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#define UARTMIE 0x28
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#define UARTVNDR 0x2c
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#define UARTVNDR 0x2c
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