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refactor(cpus): convert the Cortex-A73 to use the cpu helpers

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Change-Id: I910c657b3064b8e19eb84656109074ddf0e4ece8
Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
This commit is contained in:
Sona Mathew 2023-06-19 19:08:18 -05:00
parent 7711223d00
commit 51e9eb101e
1 changed files with 8 additions and 22 deletions
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30
lib/cpus/aarch64/cortex_a73.S
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@ -15,9 +15,7 @@
* ---------------------------------------------
*/
func cortex_a73_disable_dcache
mrs x1, sctlr_el3
bic x1, x1, #SCTLR_C_BIT
msr sctlr_el3, x1
sysreg_bit_clear sctlr_el3, SCTLR_C_BIT
isb
ret
endfunc cortex_a73_disable_dcache
@ -27,9 +25,7 @@ endfunc cortex_a73_disable_dcache
* ---------------------------------------------
*/
func cortex_a73_disable_smp
mrs x0, CORTEX_A73_CPUECTLR_EL1
bic x0, x0, #CORTEX_A73_CPUECTLR_SMP_BIT
msr CORTEX_A73_CPUECTLR_EL1, x0
sysreg_bit_clear CORTEX_A73_CPUECTLR_EL1, CORTEX_A73_CPUECTLR_SMP_BIT
isb
dsb sy
ret
@ -41,25 +37,20 @@ func check_smccc_arch_workaround_3
endfunc check_smccc_arch_workaround_3
workaround_reset_start cortex_a73, ERRATUM(852427), ERRATA_A73_852427
mrs x1, CORTEX_A73_DIAGNOSTIC_REGISTER
orr x1, x1, #(1 << 12)
msr CORTEX_A73_DIAGNOSTIC_REGISTER, x1
sysreg_bit_set CORTEX_A73_DIAGNOSTIC_REGISTER, BIT(12)
workaround_reset_end cortex_a73, ERRATUM(852427)
check_erratum_ls cortex_a73, ERRATUM(852427), CPU_REV(0, 0)
workaround_reset_start cortex_a73, ERRATUM(855423), ERRATA_A73_855423
mrs x1, CORTEX_A73_IMP_DEF_REG2
orr x1, x1, #(1 << 7)
msr CORTEX_A73_IMP_DEF_REG2, x1
sysreg_bit_set CORTEX_A73_IMP_DEF_REG2, BIT(7)
workaround_reset_end cortex_a73, ERRATUM(855423)
check_erratum_ls cortex_a73, ERRATUM(855423), CPU_REV(0, 1)
workaround_reset_start cortex_a73, CVE(2017, 5715), WORKAROUND_CVE_2017_5715
#if IMAGE_BL31
adr x0, wa_cve_2017_5715_bpiall_vbar
msr vbar_el3, x0
override_vector_table wa_cve_2017_5715_bpiall_vbar
#endif /* IMAGE_BL31 */
workaround_reset_end cortex_a73, CVE(2017, 5715)
@ -77,9 +68,7 @@ check_erratum_custom_start cortex_a73, CVE(2017, 5715)
check_erratum_custom_end cortex_a73, CVE(2017, 5715)
workaround_reset_start cortex_a73, CVE(2018, 3639), WORKAROUND_CVE_2018_3639
mrs x0, CORTEX_A73_IMP_DEF_REG1
orr x0, x0, #CORTEX_A73_IMP_DEF_REG1_DISABLE_LOAD_PASS_STORE
msr CORTEX_A73_IMP_DEF_REG1, x0
sysreg_bit_set CORTEX_A73_IMP_DEF_REG1, CORTEX_A73_IMP_DEF_REG1_DISABLE_LOAD_PASS_STORE
workaround_reset_end cortex_a73, CVE(2018, 3639)
check_erratum_chosen cortex_a73, CVE(2018, 3639), WORKAROUND_CVE_2018_3639
@ -87,8 +76,7 @@ check_erratum_chosen cortex_a73, CVE(2018, 3639), WORKAROUND_CVE_2018_3639
workaround_reset_start cortex_a73, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
#if IMAGE_BL31
/* Skip installing vector table again for CVE_2022_23960 */
adr x0, wa_cve_2017_5715_bpiall_vbar
mrs x1, vbar_el3
override_vector_table wa_cve_2017_5715_bpiall_vbar
cmp x0, x1
b.eq 1f
msr vbar_el3, x0
@ -124,9 +112,7 @@ cpu_reset_func_start cortex_a73
* Clobbers : x0
* ---------------------------------------------
*/
mrs x0, CORTEX_A73_CPUECTLR_EL1
orr x0, x0, #CORTEX_A73_CPUECTLR_SMP_BIT
msr CORTEX_A73_CPUECTLR_EL1, x0
sysreg_bit_set CORTEX_A73_CPUECTLR_EL1, CORTEX_A73_CPUECTLR_SMP_BIT
cpu_reset_func_end cortex_a73
func cortex_a73_core_pwr_dwn