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Merge "docs(security): rename Makalu and SB optimisation" into integration
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51a96ceeec
1 changed files with 4 additions and 2 deletions
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@ -75,7 +75,7 @@ revisions of Cortex-A73 and Cortex-A75 that implements FEAT_CSV2).
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+----------------------+
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+----------------------+
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| Cortex-A710 |
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| Cortex-A710 |
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+----------------------+
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+----------------------+
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| Cortex-Makalu |
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| Cortex-A715 |
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+----------------------+
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+----------------------+
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| Cortex-Hunter |
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| Cortex-Hunter |
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+----------------------+
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+----------------------+
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@ -99,7 +99,9 @@ In case local workaround is not feasible, the Rich OS can invoke the SMC
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Convention specification`_ for more details.
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Convention specification`_ for more details.
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`Gerrit topic #spectre_bhb`_ This patchset implements the Spectre-BHB loop
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`Gerrit topic #spectre_bhb`_ This patchset implements the Spectre-BHB loop
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workaround for CPUs mentioned in the above table. It also mitigates against
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workaround for CPUs mentioned in the above table. For CPUs supporting
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speculative barrier instruction, the loop workaround is optimised by using SB
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in place of the common DSB and ISB sequence. It also mitigates against
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this vulnerability for Cortex-A72 CPU versions that support the CSV2 feature
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this vulnerability for Cortex-A72 CPU versions that support the CSV2 feature
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(from r1p0). The patch stack also includes an implementation for a specified
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(from r1p0). The patch stack also includes an implementation for a specified
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`CVE-2022-23960`_ workaround SMC(``SMCCC_ARCH_WORKAROUND_3``) for use by normal
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`CVE-2022-23960`_ workaround SMC(``SMCCC_ARCH_WORKAROUND_3``) for use by normal
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