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feat(nxp-clk): dynamic map of the clock modules
Add all clock modules as entries in MMU using dynamic regions. Change-Id: I56f724ced4bd024554c7b38afd14ea420de80cc6 Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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008925861f
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514c738045
3 changed files with 47 additions and 3 deletions
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@ -7,6 +7,7 @@
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#include <common/debug.h>
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#include <common/debug.h>
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#include <drivers/clk.h>
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#include <drivers/clk.h>
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#include <lib/mmio.h>
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#include <lib/mmio.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <s32cc-clk-ids.h>
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#include <s32cc-clk-ids.h>
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#include <s32cc-clk-modules.h>
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#include <s32cc-clk-modules.h>
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#include <s32cc-clk-regs.h>
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#include <s32cc-clk-regs.h>
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@ -1464,7 +1465,39 @@ static int s32cc_clk_set_parent(unsigned long id, unsigned long parent_id)
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return 0;
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return 0;
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}
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}
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void s32cc_clk_register_drv(void)
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static int s32cc_clk_mmap_regs(const struct s32cc_clk_drv *drv)
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{
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const uintptr_t base_addrs[11] = {
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drv->fxosc_base,
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drv->armpll_base,
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drv->periphpll_base,
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drv->armdfs_base,
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drv->cgm0_base,
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drv->cgm1_base,
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drv->cgm5_base,
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drv->ddrpll_base,
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drv->mc_me,
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drv->mc_rgm,
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drv->rdc,
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};
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size_t i;
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int ret;
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for (i = 0U; i < ARRAY_SIZE(base_addrs); i++) {
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ret = mmap_add_dynamic_region(base_addrs[i], base_addrs[i],
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PAGE_SIZE,
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MT_DEVICE | MT_RW | MT_SECURE);
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if (ret != 0) {
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ERROR("Failed to map clock module 0x%" PRIuPTR "\n",
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base_addrs[i]);
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return ret;
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}
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}
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return 0;
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}
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int s32cc_clk_register_drv(void)
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{
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{
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static const struct clk_ops s32cc_clk_ops = {
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static const struct clk_ops s32cc_clk_ops = {
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.enable = s32cc_clk_enable,
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.enable = s32cc_clk_enable,
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@ -1475,7 +1508,15 @@ void s32cc_clk_register_drv(void)
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.get_parent = s32cc_clk_get_parent,
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.get_parent = s32cc_clk_get_parent,
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.set_parent = s32cc_clk_set_parent,
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.set_parent = s32cc_clk_set_parent,
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};
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};
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const struct s32cc_clk_drv *drv;
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clk_register(&s32cc_clk_ops);
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clk_register(&s32cc_clk_ops);
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drv = get_drv();
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if (drv == NULL) {
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return -EINVAL;
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}
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return s32cc_clk_mmap_regs(drv);
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}
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}
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@ -184,7 +184,10 @@ int s32cc_init_early_clks(void)
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{
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{
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int ret;
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int ret;
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s32cc_clk_register_drv();
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ret = s32cc_clk_register_drv();
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if (ret != 0) {
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return ret;
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}
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ret = setup_fxosc();
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ret = setup_fxosc();
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if (ret != 0) {
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if (ret != 0) {
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@ -18,6 +18,6 @@ int s32cc_get_id_from_table(const struct s32cc_clk_array *const *clk_arr,
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struct s32cc_clk *s32cc_get_arch_clk(unsigned long id);
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struct s32cc_clk *s32cc_get_arch_clk(unsigned long id);
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int s32cc_get_clk_id(const struct s32cc_clk *clk, unsigned long *id);
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int s32cc_get_clk_id(const struct s32cc_clk *clk, unsigned long *id);
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void s32cc_clk_register_drv(void);
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int s32cc_clk_register_drv(void);
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#endif /* S32CC_CLK_UTILS_H */
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#endif /* S32CC_CLK_UTILS_H */
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