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rpi3: add RPI3_USE_UEFI_MAP build option
The default Raspberry Pi 3 memory mapping for ATF is geared towards the use of uboot + Linux. This creates issues when trying to use ATF with an UEFI payload and Windows on ARM64. We therefore introduce new build option RPI3_USE_UEFI_MAP, that enables the build process to use an alternate memory mapping that is compatible with UEFI + Windows (as well as UEFI + Linux). Fixes ARM-software/tf-issues#649 Signed-off-by: Pete Batard <pete@akeo.ie>
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3 changed files with 60 additions and 1 deletions
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@ -235,6 +235,41 @@ The following build options are supported:
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or disabled. ``-1`` (default) disables the runtime UART. Any other value
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enables the default UART (currently UART1) for runtime messages.
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- ``RPI3_USE_UEFI_MAP``: Set to 1 to build ATF with the altername memory
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mapping required for an UEFI firmware payload. These changes are needed
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to be able to run Windows on ARM64. This option, which is disabled by
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default, results in the following memory mappings:
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::
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0x00000000 +-----------------+
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| ROM | BL1
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0x00010000 +-----------------+
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| DTB | (Loaded by the VideoCore)
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0x00020000 +-----------------+
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| FIP |
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0x00030000 +-----------------+
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| UEFI PAYLOAD |
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0x00200000 +-----------------+
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| Secure SRAM | BL2, BL31
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0x00300000 +-----------------+
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| Secure DRAM | BL32 (Secure payload)
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0x00400000 +-----------------+
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| Non-secure DRAM | BL33
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0x01000000 +-----------------+
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| ... |
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0x3F000000 +-----------------+
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| I/O |
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- ``BL32``: This port can load and run OP-TEE. The OP-TEE image is optional.
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Please use the code from `here <https://github.com/OP-TEE/optee_os>`__.
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Build the Trusted Firmware with option ``BL32=tee-header_v2.bin
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@ -63,6 +63,25 @@
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* secure DRAM. Note that this is all actually DRAM with different names,
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* there is no Secure RAM in the Raspberry Pi 3.
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*/
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#if RPI3_USE_UEFI_MAP
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#define SEC_ROM_BASE ULL(0x00000000)
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#define SEC_ROM_SIZE ULL(0x00010000)
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/* FIP placed after ROM to append it to BL1 with very little padding. */
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#define PLAT_RPI3_FIP_BASE ULL(0x00020000)
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#define PLAT_RPI3_FIP_MAX_SIZE ULL(0x00010000)
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/* Reserve 2M of secure SRAM and DRAM, starting at 2M */
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#define SEC_SRAM_BASE ULL(0x00200000)
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#define SEC_SRAM_SIZE ULL(0x00100000)
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#define SEC_DRAM0_BASE ULL(0x00300000)
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#define SEC_DRAM0_SIZE ULL(0x00100000)
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/* Windows on ARM requires some RAM at 4M */
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#define NS_DRAM0_BASE ULL(0x00400000)
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#define NS_DRAM0_SIZE ULL(0x00C00000)
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#else
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#define SEC_ROM_BASE ULL(0x00000000)
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#define SEC_ROM_SIZE ULL(0x00020000)
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@ -80,6 +99,7 @@
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#define NS_DRAM0_BASE ULL(0x11000000)
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#define NS_DRAM0_SIZE ULL(0x01000000)
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#endif /* RPI3_USE_UEFI_MAP */
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/*
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* BL33 entrypoint.
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@ -113,6 +113,9 @@ RPI3_DIRECT_LINUX_BOOT := 0
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# Any other value means the default UART will be used.
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RPI3_RUNTIME_UART := -1
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# Use normal memory mapping for ROM, FIP, SRAM and DRAM
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RPI3_USE_UEFI_MAP := 0
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# BL32 location
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RPI3_BL32_RAM_LOCATION := tdram
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ifeq (${RPI3_BL32_RAM_LOCATION}, tsram)
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@ -131,6 +134,7 @@ $(eval $(call add_define,RPI3_BL33_IN_AARCH32))
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$(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT))
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$(eval $(call add_define,RPI3_PRELOADED_DTB_BASE))
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$(eval $(call add_define,RPI3_RUNTIME_UART))
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$(eval $(call add_define,RPI3_USE_UEFI_MAP))
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# Verify build config
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# -------------------
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