diff --git a/plat/st/common/include/stm32mp_common.h b/plat/st/common/include/stm32mp_common.h index 693640fd2..5eac5cc85 100644 --- a/plat/st/common/include/stm32mp_common.h +++ b/plat/st/common/include/stm32mp_common.h @@ -115,4 +115,7 @@ int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer); int stm32mp_map_ddr_non_cacheable(void); int stm32mp_unmap_ddr(void); +/* Function to save boot peripheral info */ +void stm32_save_boot_interface(uint32_t interface, uint32_t instance); + #endif /* STM32MP_COMMON_H */ diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c index 6c551669c..1a62de880 100644 --- a/plat/st/stm32mp1/bl2_plat_setup.c +++ b/plat/st/stm32mp1/bl2_plat_setup.c @@ -32,7 +32,6 @@ #include #include -#include #include #define RESET_TIMEOUT_US_1MS 1000U @@ -248,6 +247,9 @@ void bl2_el3_plat_arch_setup(void) stm32mp1_syscfg_init(); + stm32_save_boot_interface(boot_context->boot_interface_selected, + boot_context->boot_interface_instance); + #if STM32MP_USB_PROGRAMMER /* Deconfigure all UART RX pins configured by ROM code */ stm32mp1_deconfigure_uart_pins(); @@ -319,12 +321,6 @@ skip_console_init: INFO("IWDG2 freeze error : %i\n", result); } - if (stm32_save_boot_interface(boot_context->boot_interface_selected, - boot_context->boot_interface_instance) != - 0) { - ERROR("Cannot save boot interface\n"); - } - stm32mp1_auth_ops.check_key = boot_context->bootrom_ecdsa_check_key; stm32mp1_auth_ops.verify_signature = boot_context->bootrom_ecdsa_verify_signature; diff --git a/plat/st/stm32mp1/include/stm32mp1_context.h b/plat/st/stm32mp1/include/stm32mp1_context.h deleted file mode 100644 index 698415af2..000000000 --- a/plat/st/stm32mp1/include/stm32mp1_context.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef STM32MP1_CONTEXT_H -#define STM32MP1_CONTEXT_H - -#include - -int stm32_save_boot_interface(uint32_t interface, uint32_t instance); - -#endif /* STM32MP1_CONTEXT_H */ diff --git a/plat/st/stm32mp1/platform.mk b/plat/st/stm32mp1/platform.mk index 7455d629e..3a76d2863 100644 --- a/plat/st/stm32mp1/platform.mk +++ b/plat/st/stm32mp1/platform.mk @@ -202,7 +202,6 @@ PLAT_BL_COMMON_SOURCES += drivers/arm/tzc/tzc400.c \ drivers/st/pmic/stpmic1.c \ drivers/st/reset/stm32mp1_reset.c \ plat/st/common/stm32mp_dt.c \ - plat/st/stm32mp1/stm32mp1_context.c \ plat/st/stm32mp1/stm32mp1_dbgmcu.c \ plat/st/stm32mp1/stm32mp1_helper.S \ plat/st/stm32mp1/stm32mp1_syscfg.c diff --git a/plat/st/stm32mp1/stm32mp1_context.c b/plat/st/stm32mp1/stm32mp1_context.c deleted file mode 100644 index cf8a91eb4..000000000 --- a/plat/st/stm32mp1/stm32mp1_context.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -#include - -#include -#include -#include - -#include - -#define TAMP_BOOT_ITF_BACKUP_REG_ID U(20) -#define TAMP_BOOT_ITF_MASK U(0x0000FF00) -#define TAMP_BOOT_ITF_SHIFT 8 - -int stm32_save_boot_interface(uint32_t interface, uint32_t instance) -{ - uint32_t bkpr_itf_idx = tamp_bkpr(TAMP_BOOT_ITF_BACKUP_REG_ID); - - stm32mp_clk_enable(RTCAPB); - - mmio_clrsetbits_32(bkpr_itf_idx, - TAMP_BOOT_ITF_MASK, - ((interface << 4) | (instance & 0xFU)) << - TAMP_BOOT_ITF_SHIFT); - - stm32mp_clk_disable(RTCAPB); - - return 0; -} diff --git a/plat/st/stm32mp1/stm32mp1_private.c b/plat/st/stm32mp1/stm32mp1_private.c index 61c40f124..594460203 100644 --- a/plat/st/stm32mp1/stm32mp1_private.c +++ b/plat/st/stm32mp1/stm32mp1_private.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include @@ -34,6 +35,10 @@ BOARD_ID_VARFG_SHIFT) #define BOARD_ID2BOM(_id) ((_id) & BOARD_ID_BOM_MASK) +#define TAMP_BOOT_MODE_BACKUP_REG_ID U(20) +#define TAMP_BOOT_MODE_ITF_MASK U(0x0000FF00) +#define TAMP_BOOT_MODE_ITF_SHIFT 8 + #if defined(IMAGE_BL2) #define MAP_SEC_SYSRAM MAP_REGION_FLAT(STM32MP_SYSRAM_BASE, \ STM32MP_SYSRAM_SIZE, \ @@ -556,3 +561,17 @@ uint32_t stm32mp_get_ddr_ns_size(void) return ddr_ns_size; } #endif /* STM32MP_USE_STM32IMAGE */ + +void stm32_save_boot_interface(uint32_t interface, uint32_t instance) +{ + uint32_t bkpr_itf_idx = tamp_bkpr(TAMP_BOOT_MODE_BACKUP_REG_ID); + + stm32mp_clk_enable(RTCAPB); + + mmio_clrsetbits_32(bkpr_itf_idx, + TAMP_BOOT_MODE_ITF_MASK, + ((interface << 4) | (instance & 0xFU)) << + TAMP_BOOT_MODE_ITF_SHIFT); + + stm32mp_clk_disable(RTCAPB); +}