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Merge "plat: imx8m: Add the aipstz init to config peripheral access" into integration

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This commit is contained in:
Soby Mathew 2019-05-28 13:18:56 +00:00 • committed by TrustedFirmware Code Review
commit 4d384eb4ed
6 changed files with 74 additions and 0 deletions
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10
plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c
View file

@ -22,6 +22,7 @@
#include <plat/common/platform.h>
#include <gpc.h>
#include <imx_aipstz.h>
#include <imx_uart.h>
#include <plat_imx8.h>
@ -31,6 +32,14 @@ static const mmap_region_t imx_mmap[] = {
{0},
};
static const struct aipstz_cfg aipstz[] = {
{IMX_AIPSTZ1, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, },
{IMX_AIPSTZ2, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, },
{IMX_AIPSTZ3, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, },
{IMX_AIPSTZ4, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, },
{0},
};
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
@ -82,6 +91,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
mmio_write_32(IMX_CSU_BASE + i * 4, 0x00ff00ff);
}
imx_aipstz_init(aipstz);
console_imx_uart_register(IMX_BOOT_UART_BASE, IMX_BOOT_UART_CLK_IN_HZ,
IMX_CONSOLE_BAUDRATE, &console);

1
plat/imx/imx8m/imx8mm/platform.mk
View file

@ -19,6 +19,7 @@ IMX_GIC_SOURCES := drivers/arm/gic/v3/gicv3_helpers.c \
BL31_SOURCES += plat/imx/common/imx8_helpers.S \
plat/imx/imx8m/gpc_common.c \
plat/imx/imx8m/imx_aipstz.c \
plat/imx/imx8m/imx8m_psci_common.c \
plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c \
plat/imx/imx8m/imx8mm/imx8mm_psci.c \

11
plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c
View file

@ -22,6 +22,7 @@
#include <plat/common/platform.h>
#include <gpc.h>
#include <imx_aipstz.h>
#include <imx_uart.h>
#include <plat_imx8.h>
@ -33,6 +34,14 @@ static const mmap_region_t imx_mmap[] = {
{0},
};
static const struct aipstz_cfg aipstz[] = {
{AIPSTZ1_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, },
{AIPSTZ2_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, },
{AIPSTZ3_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, },
{AIPSTZ4_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, },
{0},
};
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
@ -118,6 +127,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
mmio_write_32(IMX_CSU_BASE + i * 4, 0xffffffff);
}
imx_aipstz_init(aipstz);
/* config CAAM JRaMID set MID to Cortex A */
mmio_write_32(CAAM_JR0MID, CAAM_NS_MID);
mmio_write_32(CAAM_JR1MID, CAAM_NS_MID);

1
plat/imx/imx8m/imx8mq/platform.mk
View file

@ -21,6 +21,7 @@ BL31_SOURCES += plat/imx/common/imx8_helpers.S \
plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c \
plat/imx/imx8m/imx8mq/imx8mq_psci.c \
plat/imx/imx8m/gpc_common.c \
plat/imx/imx8m/imx_aipstz.c \
plat/imx/imx8m/imx8m_psci_common.c \
plat/imx/imx8m/imx8mq/gpc.c \
plat/imx/common/imx8_topology.c \

24
plat/imx/imx8m/imx_aipstz.c Normal file
View file

@ -0,0 +1,24 @@
/*
* copyright (c) 2019, arm limited and contributors. all rights reserved.
*
* spdx-license-identifier: bsd-3-clause
*/
#include <lib/mmio.h>
#include <imx_aipstz.h>
void imx_aipstz_init(const struct aipstz_cfg *aipstz_cfg)
{
const struct aipstz_cfg *aipstz = aipstz_cfg;
while (aipstz->base != 0U) {
mmio_write_32(aipstz->base + AIPSTZ_MPR0, aipstz->mpr0);
mmio_write_32(aipstz->base + AIPSTZ_MPR1, aipstz->mpr1);
for (int i = 0; i < AIPSTZ_OPACR_NUM; i++)
mmio_write_32(aipstz->base + OPACR_OFFSET(i), aipstz->opacr[i]);
aipstz++;
}
}

27
plat/imx/imx8m/include/imx_aipstz.h Normal file
View file

@ -0,0 +1,27 @@
/*
* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef IMX_AIPSTZ_H
#define IMX_AIPSTZ_H
#include <lib/utils_def.h>
#define AIPSTZ_MPR0 U(0x0)
#define AIPSTZ_MPR1 U(0x4)
#define AIPSTZ_OPACR_NUM U(0x5)
#define OPACR_OFFSET(i) U((i) * 4 + 0x40)
struct aipstz_cfg {
uintptr_t base;
uint32_t mpr0;
uint32_t mpr1;
uint32_t opacr[AIPSTZ_OPACR_NUM];
};
void imx_aipstz_init(const struct aipstz_cfg *aipstz_cfg);
#endif /* IMX_AIPSTZ_H */