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chore(cpus): rearrange the errata and cve in order in Neoverse-V3

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Patch sorts the errata IDs in ascending order and the CVE's
in ascending order based on the year and index for Neoverse-V3.

Change-Id: I108eb2896e24c135d56e5096289766d777b48b48
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
This commit is contained in:
Sona Mathew 2025-03-19 17:59:48 -05:00 • committed by Arvind Ram Prakash
parent 6b922fe0f3
commit 4cf62406ed
1 changed files with 11 additions and 11 deletions
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22
lib/cpus/aarch64/neoverse_v3.S
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@ -26,10 +26,6 @@ cpu_reset_prologue neoverse_v3
.global check_erratum_neoverse_v3_3701767 .global check_erratum_neoverse_v3_3701767
add_erratum_entry neoverse_v3, ERRATUM(3701767), ERRATA_V3_3701767
check_erratum_ls neoverse_v3, ERRATUM(3701767), CPU_REV(0, 2)
workaround_reset_start neoverse_v3, ERRATUM(2970647), ERRATA_V3_2970647 workaround_reset_start neoverse_v3, ERRATUM(2970647), ERRATA_V3_2970647
/* Add ISB before MRS reads of MPIDR_EL1/MIDR_EL1 */ /* Add ISB before MRS reads of MPIDR_EL1/MIDR_EL1 */
ldr x0, =0x1 ldr x0, =0x1
@ -45,17 +41,14 @@ workaround_reset_end neoverse_v3, ERRATUM(2970647)
check_erratum_ls neoverse_v3, ERRATUM(2970647), CPU_REV(0, 0) check_erratum_ls neoverse_v3, ERRATUM(2970647), CPU_REV(0, 0)
add_erratum_entry neoverse_v3, ERRATUM(3701767), ERRATA_V3_3701767
check_erratum_ls neoverse_v3, ERRATUM(3701767), CPU_REV(0, 2)
#if WORKAROUND_CVE_2022_23960 #if WORKAROUND_CVE_2022_23960
wa_cve_2022_23960_bhb_vector_table NEOVERSE_V3_BHB_LOOP_COUNT, neoverse_v3 wa_cve_2022_23960_bhb_vector_table NEOVERSE_V3_BHB_LOOP_COUNT, neoverse_v3
#endif /* WORKAROUND_CVE_2022_23960 */ #endif /* WORKAROUND_CVE_2022_23960 */
/* Disable hardware page aggregation. Enables mitigation for `CVE-2024-5660` */
workaround_reset_start neoverse_v3, CVE(2024, 5660), WORKAROUND_CVE_2024_5660
sysreg_bit_set NEOVERSE_V3_CPUECTLR_EL1, BIT(46)
workaround_reset_end neoverse_v3, CVE(2024, 5660)
check_erratum_ls neoverse_v3, CVE(2024, 5660), CPU_REV(0, 1)
workaround_reset_start neoverse_v3, CVE(2022,23960), WORKAROUND_CVE_2022_23960 workaround_reset_start neoverse_v3, CVE(2022,23960), WORKAROUND_CVE_2022_23960
#if IMAGE_BL31 #if IMAGE_BL31
/* /*
@ -69,6 +62,13 @@ workaround_reset_end neoverse_v3, CVE(2022,23960)
check_erratum_chosen neoverse_v3, CVE(2022, 23960), WORKAROUND_CVE_2022_23960 check_erratum_chosen neoverse_v3, CVE(2022, 23960), WORKAROUND_CVE_2022_23960
/* Disable hardware page aggregation. Enables mitigation for `CVE-2024-5660` */
workaround_reset_start neoverse_v3, CVE(2024, 5660), WORKAROUND_CVE_2024_5660
sysreg_bit_set NEOVERSE_V3_CPUECTLR_EL1, BIT(46)
workaround_reset_end neoverse_v3, CVE(2024, 5660)
check_erratum_ls neoverse_v3, CVE(2024, 5660), CPU_REV(0, 1)
workaround_reset_start neoverse_v3, CVE(2024, 7881), WORKAROUND_CVE_2024_7881 workaround_reset_start neoverse_v3, CVE(2024, 7881), WORKAROUND_CVE_2024_7881
/* --------------------------------- /* ---------------------------------
* Sets BIT41 of CPUACTLR6_EL1 which * Sets BIT41 of CPUACTLR6_EL1 which