feat(tc): bind SMMU-600 with the DPU on TC3 FPGA

The SMMU 600 is used on TC3 FPGA board with the display device, add the
device tree binding for it.

Change-Id: Iadf85873720ca47bbbda999aa7b18a9db98ae945
Signed-off-by: Ben Horgan <ben.horgan@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
This commit is contained in:
Ben Horgan 2024-06-04 13:22:53 +01:00 committed by Leo Yan
parent 0458d3acae
commit 4c6960ca40
2 changed files with 20 additions and 0 deletions

View file

@ -504,6 +504,18 @@
thermal-zone = "";
};
smmu_600: smmu@2ce00000 {
compatible = "arm,smmu-v3";
reg = <0 0x2ce00000 0 0x20000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 74 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 76 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 77 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "eventq", "priq", "cmdq-sync", "gerror";
#iommu-cells = <1>;
status = "disabled";
};
smmu_700: iommu@3f000000 {
#iommu-cells = <1>;
compatible = "arm,smmu-v3";

View file

@ -94,12 +94,20 @@
smmu_700_dpu: iommu@4002a00000 {
status = "okay";
};
#else
smmu_600: smmu@2ce00000 {
status = "okay";
};
#endif
dp0: display@DPU_ADDR {
#if TARGET_FLAVOUR_FVP
iommus = <&smmu_700_dpu 0x000>, <&smmu_700_dpu 0x100>,
<&smmu_700_dpu 0x200>, <&smmu_700_dpu 0x600>;
#else /* TARGET_FLAVOUR_FPGA */
iommus = <&smmu_600 0>, <&smmu_600 1>, <&smmu_600 2>, <&smmu_600 3>,
<&smmu_600 4>, <&smmu_600 5>, <&smmu_600 6>, <&smmu_600 7>,
<&smmu_600 8>, <&smmu_600 9>;
#endif
};